[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-riscv] [Qemu-devel] [PATCH v6 05/26] hw/s390x: Access MemoryRe
From: |
Cornelia Huck |
Subject: |
Re: [Qemu-riscv] [Qemu-devel] [PATCH v6 05/26] hw/s390x: Access MemoryRegion with MemOp |
Date: |
Thu, 8 Aug 2019 16:31:02 +0200 |
On Wed, 7 Aug 2019 08:27:35 +0000
<address@hidden> wrote:
> The memory_region_dispatch_{read|write} operand "unsigned size" is
> being converted into a "MemOp op".
>
> Convert interfaces by using no-op size_memop.
>
> After all interfaces are converted, size_memop will be implemented
> and the memory_region_dispatch_{read|write} operand "unsigned size"
> will be converted into a "MemOp op".
>
> As size_memop is a no-op, this patch does not change any behaviour.
>
> Signed-off-by: Tony Nguyen <address@hidden>
> Reviewed-by: Richard Henderson <address@hidden>
> ---
> hw/s390x/s390-pci-inst.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
Reviewed-by: Cornelia Huck <address@hidden>
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v6 13/26] target/mips: Hard code size with MO_{8|16|32|64}, (continued)
- [Qemu-riscv] [Qemu-devel] [PATCH v6 14/26] exec: Hard code size with MO_{8|16|32|64}, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 25/26] target/sparc: Add TLB entry with attributes, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 12/26] hw/s390x: Hard code size with MO_{8|16|32|64}, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 03/26] memory: Introduce size_memop, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 05/26] hw/s390x: Access MemoryRegion with MemOp, tony.nguyen, 2019/08/07
- Re: [Qemu-riscv] [Qemu-devel] [PATCH v6 05/26] hw/s390x: Access MemoryRegion with MemOp,
Cornelia Huck <=
- [Qemu-riscv] [Qemu-devel] [PATCH v6 17/26] exec: Replace device_endian with MemOp, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 22/26] memory: Single byte swap along the I/O path, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 23/26] cpu: TLB_FLAGS_MASK bit to force memory slow path, tony.nguyen, 2019/08/07
- [Qemu-riscv] [Qemu-devel] [PATCH v6 20/26] memory: Access MemoryRegion with endianness, tony.nguyen, 2019/08/07