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Re: [Qemu-riscv] [Qemu-devel] [PATCH] target/riscv: Disallow WFI instruc


From: Alistair Francis
Subject: Re: [Qemu-riscv] [Qemu-devel] [PATCH] target/riscv: Disallow WFI instruction from U-mode
Date: Wed, 3 Jul 2019 15:28:27 -0700

On Wed, Jul 3, 2019 at 12:07 PM Jonathan Behrens <address@hidden> wrote:
>
> Signed-off-by: Jonathan Behrens <address@hidden>

>From the text in the spec it sounds like it should be an illegal
instruction exception, at least for now (see below). Maybe it's worth
mentioning in the commit that WFI in U-Mode is allowed if it completes
within some time limit?

"
When S-mode is implemented, then executing WFI in U-mode causes an
illegal instruction excep-
tion, unless it completes within an implementation-specific, bounded
time limit. A future revision
of this specification might add a feature that allows S-mode to
selectively permit WFI in U-mode.
Such a feature would only be active when TW=0.
"

Reviewed-by: Alistair Francis <address@hidden>

Alistair

> ---
>  target/riscv/op_helper.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/op_helper.c b/target/riscv/op_helper.c
> index 331cc36232..2e5a980192 100644
> --- a/target/riscv/op_helper.c
> +++ b/target/riscv/op_helper.c
> @@ -129,10 +129,10 @@ target_ulong helper_mret(CPURISCVState *env, 
> target_ulong cpu_pc_deb)
>  void helper_wfi(CPURISCVState *env)
>  {
>      CPUState *cs = env_cpu(env);
> -
> -    if (env->priv == PRV_S &&
> -        env->priv_ver >= PRIV_VERSION_1_10_0 &&
> -        get_field(env->mstatus, MSTATUS_TW)) {
> +    if (!(env->priv >= PRV_S) ||
> +        (env->priv == PRV_S &&
> +         env->priv_ver >= PRIV_VERSION_1_10_0 &&
> +         get_field(env->mstatus, MSTATUS_TW))) {
>          riscv_raise_exception(env, RISCV_EXCP_ILLEGAL_INST, GETPC());
>      } else {
>          cs->halted = 1;
> --
> 2.22.0
>



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