Re: [Qemu-riscv] [PATCH v2 0/4] Miscellaneous patches from the RISC-V fork

[Palmer Dabbelt]

On Mon, 24 Jun 2019 16:42:27 PDT (-0700), Alistair Francis wrote:
> This should be the last series bringing the patches from the RISC-V fork
> into mainline QEMU.
>
> v2:
>  - Add Wladimir's SOB line, after talking to them
>  - Allow c.andi to have a 0 immediate
>
> Dayeol Lee (1):
>   target/riscv: Fix PMP range boundary address bug
>
> Michael Clark (3):
>   disas/riscv: Disassemble reserved compressed encodings as illegal
>   disas/riscv: Fix `rdinstreth` constraint
>   target/riscv: Implement riscv_cpu_unassigned_access
>
>  disas/riscv.c             | 51 ++++++++++++++++++++++++++-------------
>  target/riscv/cpu.c        |  1 +
>  target/riscv/cpu.h        |  2 ++
>  target/riscv/cpu_helper.c | 16 ++++++++++++
>  target/riscv/pmp.c        |  2 +-
>  5 files changed, 54 insertions(+), 18 deletions(-)

Reviewed-by: Palmer Dabbelt <address@hidden>

1 and 4 were already in, so I'm leaving them towards the front of the queue.
The others are in now.

Thanks!