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[Qemu-riscv] [PATCH v1 2/9] target/riscv: Add the privledge spec version
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From: |
Alistair Francis |
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Subject: |
[Qemu-riscv] [PATCH v1 2/9] target/riscv: Add the privledge spec version 1.11.0 |
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Date: |
Mon, 17 Jun 2019 18:31:05 -0700 |
Add support for the ratified RISC-V privledge spec.
Signed-off-by: Alistair Francis <address@hidden>
---
target/riscv/cpu.h | 1 +
target/riscv/insn_trans/trans_privileged.inc.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 1668d12018..4e58c3b856 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -81,6 +81,7 @@ enum {
#define USER_VERSION_2_02_0 0x00020200
#define PRIV_VERSION_1_09_1 0x00010901
#define PRIV_VERSION_1_10_0 0x00011000
+#define PRIV_VERSION_1_11_0 0x00011100
#define TRANSLATE_FAIL 1
#define TRANSLATE_SUCCESS 0
diff --git a/target/riscv/insn_trans/trans_privileged.inc.c
b/target/riscv/insn_trans/trans_privileged.inc.c
index 664d6ba3f2..c5e4b3e49a 100644
--- a/target/riscv/insn_trans/trans_privileged.inc.c
+++ b/target/riscv/insn_trans/trans_privileged.inc.c
@@ -90,7 +90,7 @@ static bool trans_wfi(DisasContext *ctx, arg_wfi *a)
static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a)
{
#ifndef CONFIG_USER_ONLY
- if (ctx->priv_ver == PRIV_VERSION_1_10_0) {
+ if (ctx->priv_ver >= PRIV_VERSION_1_10_0) {
gen_helper_tlb_flush(cpu_env);
return true;
}
--
2.22.0
- [Qemu-riscv] [PATCH v1 0/9] Update the RISC-V specification versions, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 2/9] target/riscv: Add the privledge spec version 1.11.0,
Alistair Francis <=
- [Qemu-riscv] [PATCH v1 3/9] target/riscv: Comment in the mcountinhibit CSR, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 1/9] target/riscv: Restructure deprecatd CPUs, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 4/9] target/riscv: Set privledge spec 1.11.0 as default, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 5/9] qemu-deprecated.texi: Deprecate the RISC-V privledge spec 1.09.1, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 6/9] target/riscv: Require either I or E base extension, Alistair Francis, 2019/06/17
- [Qemu-riscv] [PATCH v1 7/9] target/riscv: Remove user version information, Alistair Francis, 2019/06/17