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[Qemu-riscv] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct acce
From: |
Hesham Almatary |
Subject: |
[Qemu-riscv] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size |
Date: |
Tue, 21 May 2019 11:43:24 +0100 |
The PMP check should be of the memory access size rather
than TARGET_PAGE_SIZE.
Signed-off-by: Hesham Almatary <address@hidden>
---
target/riscv/cpu_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index d0b0f9cf88..ce1f47e4e3 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -410,7 +410,7 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
if (riscv_feature(env, RISCV_FEATURE_PMP) &&
(ret == TRANSLATE_SUCCESS) &&
- !pmp_hart_has_privs(env, pa, TARGET_PAGE_SIZE, 1 << access_type)) {
+ !pmp_hart_has_privs(env, pa, size, 1 << access_type)) {
ret = TRANSLATE_PMP_FAIL;
}
if (ret == TRANSLATE_PMP_FAIL) {
--
2.17.1
[Qemu-riscv] [PATCHv3 4/5] RISC-V: Fix a PMP bug where it succeeds even if PMP entry is off, Hesham Almatary, 2019/05/21
[Qemu-riscv] [PATCHv3 5/5] RISC-V: Fix a PMP check with the correct access size,
Hesham Almatary <=
Re: [Qemu-riscv] [Qemu-devel] [PATCHv3 1/5] RISC-V: Only Check PMP if MMU translation succeeds, Alistair Francis, 2019/05/21