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Re: [Qemu-riscv] [PATCH for-4.1 3/8] target/riscv: Merge argument sets f
From: |
Richard Henderson |
Subject: |
Re: [Qemu-riscv] [PATCH for-4.1 3/8] target/riscv: Merge argument sets for insn32 and insn16 |
Date: |
Thu, 25 Apr 2019 09:15:13 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 |
On 4/25/19 9:04 AM, Palmer Dabbelt wrote:
> c.lwsp with rd=0 should be an illegal instruction, but it's not. We'd need to
> re-introduce the shim to handle that quirk, but since it's not actually a new
> bug I'm OK taking the patch set and fixing that later.
That should be fixable in the decode file, without a shim.
See patch 5, where I introduce trans_illegal, for doing
exactly this for c.addi4spn.
r~