Re: [Qemu-riscv] [PATCH for 4.0 v2 0/2] Update the QEMU PLIC addresses

[Palmer Dabbelt]

On Wed, 03 Apr 2019 16:32:11 PDT (-0700), address@hidden wrote:
> On Wed, Mar 27, 2019 at 8:23 PM Palmer Dabbelt <address@hidden> wrote:
> > On Wed, 27 Mar 2019 11:51:15 PDT (-0700), Alistair Francis wrote:
> > > This series updates the PLIC address to match the documentation.
> > >
> > > This fixes: https://github.com/riscv/opensbi/issues/97
> > >
> > > V2:
> > >  - Squash patches to ensure biesctability
> > >
> > > Alistair Francis (2):
> > >   riscv: plic: Fix incorrect irq calculation
> > >   riscv: plic: Log guest errors
> > >
> > >  hw/riscv/sifive_plic.c      | 16 +++++++++++-----
> > >  hw/riscv/sifive_u.c         |  2 +-
> > >  include/hw/riscv/sifive_e.h |  2 +-
> > >  include/hw/riscv/sifive_u.h |  4 ++--
> > >  include/hw/riscv/virt.h     |  2 +-
> > >  5 files changed, 16 insertions(+), 10 deletions(-)
> > >
> > > --
> > > 2.21.0
> >
> > Thanks, I've got these on for-master.  I'll let them sit for a bit to see if
> > there are any other comments, but
> >
> > Reviewed-by: Palmer Dabbelt <address@hidden>
>
> Ping! Just want to make sure these make it into 4.0

Thanks, this got lost in the shuffle.  I just forwarded along the PR.