Re: [PATCH v2 17/19] ppc/pnv: Add a CPU nmi and resume function

[Cédric Le Goater]

On 7/12/24 14:02, Nicholas Piggin wrote:
> Power CPUs have an execution control facility that can pause, resume,
> and cause NMIs, among other things. Add a function that will nmi a CPU
> and resume it if it was paused, in preparation for implementing the
> control facility.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>


Reviewed-by: Cédric Le Goater <clg@redhat.com>

Thanks,

C.


> ---
>   include/hw/ppc/pnv.h |  2 ++
>   hw/ppc/pnv.c         | 14 +++++++++++++-
>   2 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index c56d152889..b7858d310d 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -112,6 +112,8 @@ PnvChip *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb);
>   #define PNV_FDT_ADDR          0x01000000
>   #define PNV_TIMEBASE_FREQ     512000000ULL
>   
> +void pnv_cpu_do_nmi_resume(CPUState *cs);
> +
>   /*
>    * BMC helpers
>    */
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index e405d416ff..cd96cde6c9 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -2749,11 +2749,23 @@ static void pnv_cpu_do_nmi_on_cpu(CPUState *cs, 
> run_on_cpu_data arg)
>            */
>           env->spr[SPR_SRR1] |= SRR1_WAKESCOM;
>       }
> +    if (arg.host_int == 1) {
> +        cpu_resume(cs);
> +    }
> +}
> +
> +/*
> + * Send a SRESET (NMI) interrupt to the CPU, and resume execution if it was
> + * paused.
> + */
> +void pnv_cpu_do_nmi_resume(CPUState *cs)
> +{
> +    async_run_on_cpu(cs, pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(1));
>   }
>   
>   static void pnv_cpu_do_nmi(PnvChip *chip, PowerPCCPU *cpu, void *opaque)
>   {
> -    async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_NULL);
> +    async_run_on_cpu(CPU(cpu), pnv_cpu_do_nmi_on_cpu, RUN_ON_CPU_HOST_INT(0));
>   }
>   
>   static void pnv_nmi(NMIState *n, int cpu_index, Error **errp)