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Re: [PATCH 08/43] target/ppc/mmu_common.c: Simplify ppc6xx_tlb_pte_check


From: Nicholas Piggin
Subject: Re: [PATCH 08/43] target/ppc/mmu_common.c: Simplify ppc6xx_tlb_pte_check()
Date: Thu, 04 Jul 2024 16:02:10 +1000

On Mon May 27, 2024 at 9:12 AM AEST, BALATON Zoltan wrote:
> Invert conditions to avoid deep nested ifs and return early instead.
> Remove some obvious comments that don't add more clarity.
>

Reviewed-by: Nicholas Piggin <npiggin@gmail.com>

> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
>  target/ppc/mmu_common.c | 43 ++++++++++++++++++-----------------------
>  1 file changed, 19 insertions(+), 24 deletions(-)
>
> diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
> index a5ae11394d..28adb3ca10 100644
> --- a/target/ppc/mmu_common.c
> +++ b/target/ppc/mmu_common.c
> @@ -99,31 +99,26 @@ static int ppc6xx_tlb_pte_check(mmu_ctx_t *ctx, 
> target_ulong pte0,
>                                  MMUAccessType access_type)
>  {
>      /* Check validity and table match */
> -    if (pte_is_valid(pte0) && ((pte0 >> 6) & 1) == pteh) {
> -        /* Check vsid & api */
> -        if ((pte0 & PTE_PTEM_MASK) == ctx->ptem) {
> -            if (ctx->raddr != (hwaddr)-1ULL) {
> -                /* all matches should have equal RPN, WIMG & PP */
> -                if ((ctx->raddr & PTE_CHECK_MASK) != (pte1 & 
> PTE_CHECK_MASK)) {
> -                    qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n");
> -                    return -3;
> -                }
> -            }
> -            /* Keep the matching PTE information */
> -            ctx->raddr = pte1;
> -            ctx->prot = ppc_hash32_prot(ctx->key, pte1 & HPTE32_R_PP, 
> ctx->nx);
> -            if (check_prot_access_type(ctx->prot, access_type)) {
> -                /* Access granted */
> -                qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n");
> -                return 0;
> -            } else {
> -                /* Access right violation */
> -                qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
> -                return -2;
> -            }
> -        }
> +    if (!pte_is_valid(pte0) || ((pte0 >> 6) & 1) != pteh ||
> +        (pte0 & PTE_PTEM_MASK) != ctx->ptem) {
> +        return -1;
> +    }
> +    /* all matches should have equal RPN, WIMG & PP */
> +    if (ctx->raddr != (hwaddr)-1ULL &&
> +        (ctx->raddr & PTE_CHECK_MASK) != (pte1 & PTE_CHECK_MASK)) {
> +        qemu_log_mask(CPU_LOG_MMU, "Bad RPN/WIMG/PP\n");
> +        return -3;
> +    }
> +    /* Keep the matching PTE information */
> +    ctx->raddr = pte1;
> +    ctx->prot = ppc_hash32_prot(ctx->key, pte1 & HPTE32_R_PP, ctx->nx);
> +    if (check_prot_access_type(ctx->prot, access_type)) {
> +        qemu_log_mask(CPU_LOG_MMU, "PTE access granted !\n");
> +        return 0;
> +    } else {
> +        qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n");
> +        return -2;
>      }
> -    return -1;
>  }
>  
>  static int pte_update_flags(mmu_ctx_t *ctx, target_ulong *pte1p,




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