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Re: [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit
From: |
Miles Glenn |
Subject: |
Re: [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit |
Date: |
Tue, 21 May 2024 10:44:39 -0500 |
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
Thanks,
Glenn
On Tue, 2024-05-21 at 11:30 +1000, Nicholas Piggin wrote:
> The DECAR SPR is 32-bits width.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
> ---
> target/ppc/cpu_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
> index ee01415c32..927721d49a 100644
> --- a/target/ppc/cpu_init.c
> +++ b/target/ppc/cpu_init.c
> @@ -792,7 +792,7 @@ static void register_BookE_sprs(CPUPPCState *env,
> uint64_t ivor_mask)
> 0x00000000);
> spr_register(env, SPR_BOOKE_DECAR, "DECAR",
> SPR_NOACCESS, SPR_NOACCESS,
> - SPR_NOACCESS, &spr_write_generic,
> + SPR_NOACCESS, &spr_write_generic32,
> 0x00000000);
> /* SPRGs */
> spr_register(env, SPR_USPRG0, "USPRG0",
- Re: [PATCH v2 02/12] target/ppc: improve checkstop logging, (continued)
- [PATCH v2 01/12] target/ppc: Make checkstop actually stop the system, Nicholas Piggin, 2024/05/20
- [PATCH v2 03/12] target/ppc: Implement attn instruction on BookS 64-bit processors, Nicholas Piggin, 2024/05/20
- [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit, Nicholas Piggin, 2024/05/20
- Re: [PATCH v2 04/12] target/ppc: BookE DECAR SPR is 32-bit,
Miles Glenn <=
- [PATCH v2 05/12] target/ppc: Wire up BookE ATB registers for e500 family, Nicholas Piggin, 2024/05/20
- [PATCH v2 06/12] target/ppc: Add PPR32 SPR, Nicholas Piggin, 2024/05/20
- [PATCH v2 07/12] target/ppc: add helper to write per-LPAR SPRs, Nicholas Piggin, 2024/05/20
- [PATCH v2 08/12] target/ppc: Add SMT support to simple SPRs, Nicholas Piggin, 2024/05/20
- [PATCH v2 09/12] target/ppc: Add SMT support to PTCR SPR, Nicholas Piggin, 2024/05/20