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[PATCH v5 8/9] target/ppc: Clean up ifdefs in excp_helper.c, part 3
From: |
BALATON Zoltan |
Subject: |
[PATCH v5 8/9] target/ppc: Clean up ifdefs in excp_helper.c, part 3 |
Date: |
Thu, 18 Jan 2024 23:01:50 +0100 (CET) |
Concatenate #if blocks that are ending then beginning on the next line
again.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
target/ppc/excp_helper.c | 15 ++-------------
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 2d4a72883f..5124c3e6b5 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -2496,10 +2496,8 @@ void helper_raise_exception(CPUPPCState *env, uint32_t
exception)
{
raise_exception_err_ra(env, exception, 0, 0);
}
-#endif /* CONFIG_TCG */
#ifndef CONFIG_USER_ONLY
-#ifdef CONFIG_TCG
void helper_store_msr(CPUPPCState *env, target_ulong val)
{
uint32_t excp = hreg_store_msr(env, val, 0);
@@ -2605,9 +2603,7 @@ void helper_hrfid(CPUPPCState *env)
{
do_rfi(env, env->spr[SPR_HSRR0], env->spr[SPR_HSRR1]);
}
-#endif /* TARGET_PPC64 */
-#ifdef TARGET_PPC64
void helper_rfebb(CPUPPCState *env, target_ulong s)
{
target_ulong msr = env->msr;
@@ -2707,10 +2703,8 @@ void helper_rfmci(CPUPPCState *env)
/* FIXME: choose CSRR1 or MCSRR1 based on cpu type */
do_rfi(env, env->spr[SPR_BOOKE_MCSRR0], env->spr[SPR_BOOKE_MCSRR1]);
}
-#endif /* CONFIG_TCG */
-#endif /* !defined(CONFIG_USER_ONLY) */
+#endif /* !CONFIG_USER_ONLY */
-#ifdef CONFIG_TCG
void helper_tw(CPUPPCState *env, target_ulong arg1, target_ulong arg2,
uint32_t flags)
{
@@ -2738,9 +2732,7 @@ void helper_td(CPUPPCState *env, target_ulong arg1,
target_ulong arg2,
}
}
#endif /* TARGET_PPC64 */
-#endif /* CONFIG_TCG */
-#ifdef CONFIG_TCG
static uint32_t helper_SIMON_LIKE_32_64(uint32_t x, uint64_t key, uint32_t
lane)
{
const uint16_t c = 0xfffc;
@@ -2851,11 +2843,8 @@ HELPER_HASH(HASHST, env->spr[SPR_HASHKEYR], true, NPHIE)
HELPER_HASH(HASHCHK, env->spr[SPR_HASHKEYR], false, NPHIE)
HELPER_HASH(HASHSTP, env->spr[SPR_HASHPKEYR], true, PHIE)
HELPER_HASH(HASHCHKP, env->spr[SPR_HASHPKEYR], false, PHIE)
-#endif /* CONFIG_TCG */
#ifndef CONFIG_USER_ONLY
-#ifdef CONFIG_TCG
-
/* Embedded.Processor Control */
static int dbell2irq(target_ulong rb)
{
@@ -3197,5 +3186,5 @@ bool ppc_cpu_debug_check_watchpoint(CPUState *cs,
CPUWatchpoint *wp)
return false;
}
-#endif /* CONFIG_TCG */
#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_TCG */
--
2.30.9
- [PATCH v5 0/9] Misc clean ups to target/ppc exception handling, BALATON Zoltan, 2024/01/18
- [PATCH v5 3/9] target/ppc: Fix gen_sc to use correct nip, BALATON Zoltan, 2024/01/18
- [PATCH v5 4/9] target/ppc: Move patching nip from exception handler to helper_scv, BALATON Zoltan, 2024/01/18
- [PATCH v5 1/9] target/ppc: Use env_cpu for cpu_abort in excp_helper, BALATON Zoltan, 2024/01/18
- [PATCH v5 2/9] target/ppc: Readability improvements in exception handlers, BALATON Zoltan, 2024/01/18
- [PATCH v5 5/9] target/ppc: Simplify syscall exception handlers, BALATON Zoltan, 2024/01/18
- [PATCH v5 6/9] target/ppc: Clean up ifdefs in excp_helper.c, part 1, BALATON Zoltan, 2024/01/18
- [PATCH v5 8/9] target/ppc: Clean up ifdefs in excp_helper.c, part 3,
BALATON Zoltan <=
- [PATCH v5 7/9] target/ppc: Clean up ifdefs in excp_helper.c, part 2, BALATON Zoltan, 2024/01/18
- [PATCH v5 9/9] target/ppc: Remove interrupt handler wrapper functions, BALATON Zoltan, 2024/01/18
- Re: [PATCH v5 0/9] Misc clean ups to target/ppc exception handling, BALATON Zoltan, 2024/01/30