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[PULL 15/30] target/ppc: Change partition-scope translate interface
From: |
Cédric Le Goater |
Subject: |
[PULL 15/30] target/ppc: Change partition-scope translate interface |
Date: |
Mon, 26 Jun 2023 07:56:32 +0200 |
From: Nicholas Piggin <npiggin@gmail.com>
Rather than always performing partition scope page table translation
with access type of 0 (MMU_DATA_LOAD), pass through the processor
access type which first initiated the translation sequence. Process-
scoped page table loads are then set to MMU_DATA_LOAD access type in
the xlate function.
This will allow more information to be passed to the exception
handler in the next patch.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/mmu-radix64.c | 24 ++++++++++++++++--------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 031efda0df6a..1fc1ba3ecf22 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -380,6 +380,14 @@ static int ppc_radix64_partition_scoped_xlate(PowerPCCPU
*cpu,
hwaddr pte_addr;
uint64_t pte;
+ if (pde_addr) {
+ /*
+ * Translation of process-scoped tables/directories is performed as
+ * a read-access.
+ */
+ access_type = MMU_DATA_LOAD;
+ }
+
qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx
" mmu_idx %u 0x%"HWADDR_PRIx"\n",
__func__, access_str(access_type),
@@ -477,10 +485,10 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU
*cpu,
* is only used to translate the effective addresses of the
* process table entries.
*/
- ret = ppc_radix64_partition_scoped_xlate(cpu, 0, eaddr, prtbe_addr,
- pate, &h_raddr, &h_prot,
- &h_page_size, true,
- /* mmu_idx is 5 because we're translating from hypervisor scope */
+ /* mmu_idx is 5 because we're translating from hypervisor scope */
+ ret = ppc_radix64_partition_scoped_xlate(cpu, access_type, eaddr,
+ prtbe_addr, pate, &h_raddr,
+ &h_prot, &h_page_size, true,
5, guest_visible);
if (ret) {
return ret;
@@ -519,11 +527,11 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU
*cpu,
* translation
*/
do {
- ret = ppc_radix64_partition_scoped_xlate(cpu, 0, eaddr, pte_addr,
- pate, &h_raddr, &h_prot,
- &h_page_size, true,
/* mmu_idx is 5 because we're translating from hypervisor scope */
- 5, guest_visible);
+ ret = ppc_radix64_partition_scoped_xlate(cpu, access_type, eaddr,
+ pte_addr, pate, &h_raddr,
+ &h_prot, &h_page_size,
+ true, 5, guest_visible);
if (ret) {
return ret;
}
--
2.41.0
- [PULL 11/30] ppc/spapr: Add a nested state struct, (continued)
- [PULL 13/30] ppc/spapr: Move spapr nested HV to a new file, Cédric Le Goater, 2023/06/26
- [PULL 17/30] target/ppc: Implement HEIR SPR, Cédric Le Goater, 2023/06/26
- [PULL 14/30] target/ppc: Fix instruction loading endianness in alignment interrupt, Cédric Le Goater, 2023/06/26
- [PULL 12/30] ppc/spapr: load and store l2 state with helper functions, Cédric Le Goater, 2023/06/26
- [PULL 15/30] target/ppc: Change partition-scope translate interface,
Cédric Le Goater <=
- [PULL 16/30] target/ppc: Add SRR1 prefix indication to interrupt handlers, Cédric Le Goater, 2023/06/26
- [PULL 23/30] target/ppc: Add msgsnd/p and DPDES SMT support, Cédric Le Goater, 2023/06/26
- [PULL 21/30] target/ppc: Add initial flags and helpers for SMT support, Cédric Le Goater, 2023/06/26
- [PULL 24/30] hw/ppc/spapr: Test whether TCG is enabled with tcg_enabled(), Cédric Le Goater, 2023/06/26
- [PULL 26/30] tests/avocado: boot ppc64 pseries to Linux VFS mount, Cédric Le Goater, 2023/06/26
- [PULL 19/30] target/ppc: Better CTRL SPR implementation, Cédric Le Goater, 2023/06/26
- [PULL 29/30] pnv/xive2: Check TIMA special ops against a dedicated array for P10, Cédric Le Goater, 2023/06/26
- [PULL 22/30] target/ppc: Add support for SMT CTRL register, Cédric Le Goater, 2023/06/26
- [PULL 18/30] target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts, Cédric Le Goater, 2023/06/26
- [PULL 20/30] target/ppc: Fix sc instruction handling of LEV field, Cédric Le Goater, 2023/06/26