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[PATCH v2 17/38] crypto: Add aesenc_MC
From: |
Richard Henderson |
Subject: |
[PATCH v2 17/38] crypto: Add aesenc_MC |
Date: |
Thu, 8 Jun 2023 19:23:40 -0700 |
Add a primitive for MixColumns.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
host/include/generic/host/aes-round.h | 2 +
include/crypto/aes-round.h | 18 ++++++++
crypto/aes.c | 59 +++++++++++++++++++++++++++
3 files changed, 79 insertions(+)
diff --git a/host/include/generic/host/aes-round.h
b/host/include/generic/host/aes-round.h
index e8f6bb0b99..b00e9b50b1 100644
--- a/host/include/generic/host/aes-round.h
+++ b/host/include/generic/host/aes-round.h
@@ -9,6 +9,8 @@
#define HAVE_AES_ACCEL false
#define ATTR_AES_ACCEL
+void aesenc_MC_accel(AESState *, const AESState *, bool)
+ QEMU_ERROR("unsupported accel");
void aesenc_SB_SR_AK_accel(AESState *, const AESState *,
const AESState *, bool)
QEMU_ERROR("unsupported accel");
diff --git a/include/crypto/aes-round.h b/include/crypto/aes-round.h
index 56376cc83b..9f263ca726 100644
--- a/include/crypto/aes-round.h
+++ b/include/crypto/aes-round.h
@@ -20,6 +20,24 @@ typedef union {
#include "host/aes-round.h"
+/*
+ * Perform MixColumns.
+ */
+
+void aesenc_MC_gen(AESState *ret, const AESState *st);
+void aesenc_MC_genrev(AESState *ret, const AESState *st);
+
+static inline void aesenc_MC(AESState *r, const AESState *st, bool be)
+{
+ if (HAVE_AES_ACCEL) {
+ aesenc_MC_accel(r, st, be);
+ } else if (HOST_BIG_ENDIAN == be) {
+ aesenc_MC_gen(r, st);
+ } else {
+ aesenc_MC_genrev(r, st);
+ }
+}
+
/*
* Perform SubBytes + ShiftRows.
*/
diff --git a/crypto/aes.c b/crypto/aes.c
index 767930223c..89de8e8db4 100644
--- a/crypto/aes.c
+++ b/crypto/aes.c
@@ -28,6 +28,8 @@
* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "qemu/osdep.h"
+#include "qemu/bswap.h"
+#include "qemu/bitops.h"
#include "crypto/aes.h"
#include "crypto/aes-round.h"
@@ -1293,6 +1295,63 @@ void aesenc_SB_SR_AK_genrev(AESState *r, const AESState
*s, const AESState *k)
aesenc_SB_SR_AK_swap(r, s, k, true);
}
+/* Perform MixColumns. */
+static inline void
+aesenc_MC_swap(AESState *r, const AESState *st, bool swap)
+{
+ int swap_b = swap * 0xf;
+ int swap_w = swap * 0x3;
+ bool be = HOST_BIG_ENDIAN ^ swap;
+ uint32_t t;
+
+ /* Note that AES_mc_rot is encoded for little-endian. */
+ t = ( AES_mc_rot[st->b[swap_b ^ 0x0]] ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x1]], 8) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x2]], 16) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x3]], 24));
+ if (be) {
+ t = bswap32(t);
+ }
+ r->w[swap_w ^ 0] = t;
+
+ t = ( AES_mc_rot[st->b[swap_b ^ 0x4]] ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x5]], 8) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x6]], 16) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x7]], 24));
+ if (be) {
+ t = bswap32(t);
+ }
+ r->w[swap_w ^ 1] = t;
+
+ t = ( AES_mc_rot[st->b[swap_b ^ 0x8]] ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0x9]], 8) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0xA]], 16) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0xB]], 24));
+ if (be) {
+ t = bswap32(t);
+ }
+ r->w[swap_w ^ 2] = t;
+
+ t = ( AES_mc_rot[st->b[swap_b ^ 0xC]] ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0xD]], 8) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0xE]], 16) ^
+ rol32(AES_mc_rot[st->b[swap_b ^ 0xF]], 24));
+ if (be) {
+ t = bswap32(t);
+ }
+ r->w[swap_w ^ 3] = t;
+}
+
+void aesenc_MC_gen(AESState *r, const AESState *st)
+{
+ aesenc_MC_swap(r, st, false);
+}
+
+void aesenc_MC_genrev(AESState *r, const AESState *st)
+{
+ aesenc_MC_swap(r, st, true);
+}
+
/* Perform InvSubBytes + InvShiftRows. */
static inline void
aesdec_ISB_ISR_AK_swap(AESState *ret, const AESState *st,
--
2.34.1
- Re: [PATCH v2 03/38] tests/multiarch: Add test-aes, (continued)
- [PATCH v2 08/38] target/arm: Demultiplex AESE and AESMC, Richard Henderson, 2023/06/08
- [PATCH v2 11/38] target/riscv: Use aesenc_SB_SR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 15/38] target/ppc: Use aesdec_ISB_ISR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 13/38] target/i386: Use aesdec_ISB_ISR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 16/38] target/riscv: Use aesdec_ISB_ISR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 14/38] target/arm: Use aesdec_ISB_ISR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 17/38] crypto: Add aesenc_MC,
Richard Henderson <=
- [PATCH v2 12/38] crypto: Add aesdec_ISB_ISR_AK, Richard Henderson, 2023/06/08
- [PATCH v2 18/38] target/arm: Use aesenc_MC, Richard Henderson, 2023/06/08
- [PATCH v2 21/38] target/arm: Use aesdec_IMC, Richard Henderson, 2023/06/08
- [PATCH v2 26/38] target/riscv: Use aesenc_SB_SR_MC_AK, Richard Henderson, 2023/06/08
- [PATCH v2 29/38] target/riscv: Use aesdec_ISB_ISR_IMC_AK, Richard Henderson, 2023/06/08
- [PATCH v2 20/38] target/i386: Use aesdec_IMC, Richard Henderson, 2023/06/08
- [PATCH v2 23/38] crypto: Add aesenc_SB_SR_MC_AK, Richard Henderson, 2023/06/08
- [PATCH v2 24/38] target/i386: Use aesenc_SB_SR_MC_AK, Richard Henderson, 2023/06/08
- [PATCH v2 30/38] crypto: Add aesdec_ISB_ISR_AK_IMC, Richard Henderson, 2023/06/08