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Re: [PATCH 0/5] target/ppc: powerpc_excp improvements [BookS] (4/n)


From: Fabiano Rosas
Subject: Re: [PATCH 0/5] target/ppc: powerpc_excp improvements [BookS] (4/n)
Date: Tue, 25 Jan 2022 11:54:47 -0300

Cédric Le Goater <clg@kaod.org> writes:

> On 1/24/22 19:46, Fabiano Rosas wrote:
>> This series splits the exception code for BookS CPUs: 970, POWER5+,
>> POWER7, POWER8, POWER9, POWER10. After dealing with the 405, let's go
>> back to something more familiar to give everyone a break.
>> 
>> No upfront fixes this time. The pseries code gets used a lot, so there
>> are no obvious issues and the older BookS CPUs get the benefits by
>> default since they are similar.
>
> Super ! I think this series can go in directly. I would only change
> the name to book3s because it fits better the current naming in QEMU
> and Linux.

Not that it matters that much, but QEMU emulates Books I and II as well,
doesn't it?

Book I, Power ISA User Instruction Set Architecture,
covers the base instruction set and related facilities
available to the application programmer.

Book II, Power ISA Virtual Environment Architecture,
defines the storage model and other instructions and
facilities that enable the application programmer to cre-
ate multithreaded programs and programs that interact
with certain physical realities of the computing environ-
ment.

Book III, Power ISA Operating Environment Architec-
ture, defines the supervisor instructions and related
facilities.

Anyway, I'm OK with either name.

>
> Thanks,
>
> C.



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