Re: [PATCH v2 08/14] target/ppc: 405: System call exception cleanup

[BALATON Zoltan]

On Tue, 25 Jan 2022, Cédric Le Goater wrote:
> On 1/19/22 07:09, David Gibson wrote:
> > On Tue, Jan 18, 2022 at 03:44:42PM -0300, Fabiano Rosas wrote:
> > > There's no sc 1.
> >
> > No... but what exactly should and will happen if you attempt to
> > execute an "sc 1" on 40x.  Will it be treated as an "sc 0", or will it
> > cause a 0x700?  If it's a 0x700, better double check that that is
> > generated at translation time, if you're removing the check on level
> > here.
>
> A Program Interrupt with the illegal instruction error code should be
> generated at translation time but it is not the case today. It never
> was correctly implemented AFAICT :
>
>  /* Top bit of opc2 corresponds with low bit of LEV, so use two handlers */
>  GEN_HANDLER(sc, 0x11, 0x11, 0xFF, 0x03FFF01D, PPC_FLOW),
>  GEN_HANDLER(sc, 0x11, 0x01, 0xFF, 0x03FFF01D, PPC_FLOW),
>
> We would need a simple 'sc' instruction for the PPC405 and other
> processors. Let's add that to the TODO list.

Not directly related to this but as a reminder: if I remember correctly 
VOF uses sc 1 for hypercalls and I use VOF on pegasos2 which has a G4 or 
G3 CPU that does not have this instruction but we emulate that anyway so 
this works now at least with TCG. AFAICT changes so far did not break this 
but please consider this when getting there. We could use a different 
method for hypercalls in VOF but that would either result in different VOF 
binary for different machines or needing more changes to spap,r neither of 
which is desirable, so we chose this solution for now to allow hypercalls 
on 32bit PPC if the vhyp is set. This was in commit 5e994fc019862.

Regards,
BALATON Zoltan