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[PATCH v2 18/38] target/ppc: implement vgnb
From: |
matheus . ferst |
Subject: |
[PATCH v2 18/38] target/ppc: implement vgnb |
Date: |
Tue, 25 Jan 2022 09:19:23 -0300 |
From: Matheus Ferst <matheus.ferst@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/insn32.decode | 5 ++++
target/ppc/translate/vmx-impl.c.inc | 44 +++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 0a3e39f3e9..7b629e81af 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -66,6 +66,9 @@
&VX_mp rt mp:bool vrb
@VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp
+&VX_n rt vrb n
+@VX_n ...... rt:5 .. n:3 vrb:5 ........... &VX_n
+
&VX_tb_rc vrt vrb rc:bool
@VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc
@@ -418,6 +421,8 @@ VCMPUQ 000100 ... -- ..... ..... 00100000001
@VX_bf
## Vector Bit Manipulation Instruction
+VGNB 000100 ..... -- ... ..... 10011001100 @VX_n
+
VCFUGED 000100 ..... ..... ..... 10101001101 @VX
VCLZDM 000100 ..... ..... ..... 11110000100 @VX
VCTZDM 000100 ..... ..... ..... 11111000100 @VX
diff --git a/target/ppc/translate/vmx-impl.c.inc
b/target/ppc/translate/vmx-impl.c.inc
index 78b277466a..43eb7ab70c 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1438,6 +1438,50 @@ GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE,
GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE,
vextractuw, PPC_NONE, PPC2_ISA300);
+static bool trans_VGNB(DisasContext *ctx, arg_VX_n *a)
+{
+ TCGv_i64 vrb, tmp, rt;
+ int in = 63, out = 63;
+
+ REQUIRE_INSNS_FLAGS2(ctx, ISA310);
+ REQUIRE_VECTOR(ctx);
+
+ if (a->n < 2) {
+ /*
+ * "N can be any value between 2 and 7, inclusive." Otherwise, the
+ * result is undefined, so we don't need to change RT. Also, N > 7 is
+ * impossible since the immediate field is 3 bits only.
+ */
+ return true;
+ }
+
+ vrb = tcg_temp_new_i64();
+ tmp = tcg_temp_new_i64();
+ rt = tcg_const_i64(0);
+
+ for (int dw = 1; dw >= 0; dw--) {
+ get_avr64(vrb, a->vrb, dw);
+ for (; in >= 0; in -= a->n, out--) {
+ if (in > out) {
+ tcg_gen_shri_i64(tmp, vrb, in - out);
+ } else {
+ tcg_gen_shli_i64(tmp, vrb, out - in);
+ }
+ tcg_gen_andi_i64(tmp, tmp, 1ULL << out);
+ tcg_gen_or_i64(rt, rt, tmp);
+ }
+ in += 64;
+ }
+
+ tcg_gen_trunc_i64_tl(cpu_gpr[a->rt], rt);
+
+ tcg_temp_free_i64(vrb);
+ tcg_temp_free_i64(tmp);
+ tcg_temp_free_i64(rt);
+
+ return true;
+}
+
static bool do_vextdx(DisasContext *ctx, arg_VA *a, int size, bool right,
void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr,
TCGv))
{
--
2.25.1
- [PATCH v2 08/38] target/ppc: Implement vextsd2q, (continued)
- [PATCH v2 08/38] target/ppc: Implement vextsd2q, matheus . ferst, 2022/01/25
- [PATCH v2 07/38] target/ppc: Move vexts[bhw]2[wd] to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 06/38] target/ppc: Implement vmsumudm instruction, matheus . ferst, 2022/01/25
- [PATCH v2 09/38] target/ppc: Move Vector Compare Equal/Not Equal/Greater Than to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 11/38] target/ppc: Implement Vector Compare Equal Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 12/38] target/ppc: Implement Vector Compare Greater Than Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 13/38] target/ppc: Implement Vector Compare Quadword, matheus . ferst, 2022/01/25
- [PATCH v2 14/38] target/ppc: implement vstri[bh][lr], matheus . ferst, 2022/01/25
- [PATCH v2 15/38] target/ppc: implement vclrlb, matheus . ferst, 2022/01/25
- [PATCH v2 17/38] target/ppc: implement vcntmb[bhwd], matheus . ferst, 2022/01/25
- [PATCH v2 18/38] target/ppc: implement vgnb,
matheus . ferst <=
- [PATCH v2 16/38] target/ppc: implement vclrrb, matheus . ferst, 2022/01/25
- [PATCH v2 19/38] target/ppc: Move vsel and vperm/vpermr to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 23/38] target/ppc: Implement xxpermx instruction, matheus . ferst, 2022/01/25
- [PATCH v2 20/38] target/ppc: Move xxsel to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 21/38] target/ppc: move xxperm/xxpermr to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 22/38] target/ppc: Move xxpermdi to decodetree, matheus . ferst, 2022/01/25
- [PATCH v2 25/38] target/ppc: Implement xxeval, matheus . ferst, 2022/01/25
- [PATCH v2 24/38] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i, matheus . ferst, 2022/01/25
- [PATCH v2 26/38] target/ppc: Implement xxgenpcv[bhwd]m instruction, matheus . ferst, 2022/01/25
- [PATCH v2 27/38] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree, matheus . ferst, 2022/01/25