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[PATCH 33/37] target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree
From: |
matheus . ferst |
Subject: |
[PATCH 33/37] target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree |
Date: |
Fri, 7 Jan 2022 15:56:49 -0300 |
From: Victor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
target/ppc/fpu_helper.c | 9 ++++-----
target/ppc/helper.h | 8 ++++----
target/ppc/insn32.decode | 4 ++++
target/ppc/translate/vsx-impl.c.inc | 8 ++++----
target/ppc/translate/vsx-ops.c.inc | 4 ----
5 files changed, 16 insertions(+), 17 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 7d5420c550..75bd7de15a 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2307,11 +2307,10 @@ void helper_##op(CPUPPCState *env, ppc_vsr_t *xt,
\
do_float_check_status(env, GETPC()); \
}
-VSX_SCALAR_CMP(xscmpeqdp, float64, eq, VsrD(0), 1, 0)
-VSX_SCALAR_CMP(xscmpgedp, float64, le, VsrD(0), 1, 1)
-VSX_SCALAR_CMP(xscmpgtdp, float64, lt, VsrD(0), 1, 1)
-VSX_SCALAR_CMP(xscmpnedp, float64, eq, VsrD(0), 0, 1)
-
+VSX_SCALAR_CMP(XSCMPEQDP, float64, eq, VsrD(0), 1, 0)
+VSX_SCALAR_CMP(XSCMPGEDP, float64, le, VsrD(0), 1, 1)
+VSX_SCALAR_CMP(XSCMPGTDP, float64, lt, VsrD(0), 1, 1)
+VSX_SCALAR_CMP(XSCMPNEDP, float64, eq, VsrD(0), 0, 1)
VSX_SCALAR_CMP(XSCMPEQQP, float128, eq, f128, 1, 0)
VSX_SCALAR_CMP(XSCMPGEQP, float128, le, f128, 1, 1)
VSX_SCALAR_CMP(XSCMPGTQP, float128, lt, f128, 1, 1)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index abcc51ae06..1df77748aa 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -366,10 +366,10 @@ DEF_HELPER_5(XSMADDDP, void, env, vsr, vsr, vsr, vsr)
DEF_HELPER_5(XSMSUBDP, void, env, vsr, vsr, vsr, vsr)
DEF_HELPER_5(XSNMADDDP, void, env, vsr, vsr, vsr, vsr)
DEF_HELPER_5(XSNMSUBDP, void, env, vsr, vsr, vsr, vsr)
-DEF_HELPER_4(xscmpeqdp, void, env, vsr, vsr, vsr)
-DEF_HELPER_4(xscmpgtdp, void, env, vsr, vsr, vsr)
-DEF_HELPER_4(xscmpgedp, void, env, vsr, vsr, vsr)
-DEF_HELPER_4(xscmpnedp, void, env, vsr, vsr, vsr)
+DEF_HELPER_4(XSCMPEQDP, void, env, vsr, vsr, vsr)
+DEF_HELPER_4(XSCMPGTDP, void, env, vsr, vsr, vsr)
+DEF_HELPER_4(XSCMPGEDP, void, env, vsr, vsr, vsr)
+DEF_HELPER_4(XSCMPNEDP, void, env, vsr, vsr, vsr)
DEF_HELPER_4(XSCMPEQQP, void, env, vsr, vsr, vsr)
DEF_HELPER_4(XSCMPGTQP, void, env, vsr, vsr, vsr)
DEF_HELPER_4(XSCMPGEQP, void, env, vsr, vsr, vsr)
diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
index 113aab0028..35bee046da 100644
--- a/target/ppc/insn32.decode
+++ b/target/ppc/insn32.decode
@@ -602,6 +602,10 @@ XSMAXCDP 111100 ..... ..... ..... 10000000 ...
@XX3
XSMINCDP 111100 ..... ..... ..... 10001000 ... @XX3
XSMAXJDP 111100 ..... ..... ..... 10010000 ... @XX3
XSMINJDP 111100 ..... ..... ..... 10011000 ... @XX3
+XSCMPEQDP 111100 ..... ..... ..... 00000011 ... @XX3
+XSCMPGEDP 111100 ..... ..... ..... 00010011 ... @XX3
+XSCMPGTDP 111100 ..... ..... ..... 00001011 ... @XX3
+XSCMPNEDP 111100 ..... ..... ..... 00011011 ... @XX3
XSCMPEQQP 111111 ..... ..... ..... 0001000100 - @X
XSCMPGEQP 111111 ..... ..... ..... 0011000100 - @X
XSCMPGTQP 111111 ..... ..... ..... 0011100100 - @X
diff --git a/target/ppc/translate/vsx-impl.c.inc
b/target/ppc/translate/vsx-impl.c.inc
index b31e363c1b..bbe5a70e71 100644
--- a/target/ppc/translate/vsx-impl.c.inc
+++ b/target/ppc/translate/vsx-impl.c.inc
@@ -1050,10 +1050,6 @@ GEN_VSX_HELPER_X2(xssqrtdp, 0x16, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_X2(xsrsqrtedp, 0x14, 0x04, 0, PPC2_VSX)
GEN_VSX_HELPER_X2_AB(xstdivdp, 0x14, 0x07, 0, PPC2_VSX)
GEN_VSX_HELPER_X1(xstsqrtdp, 0x14, 0x06, 0, PPC2_VSX)
-GEN_VSX_HELPER_X3(xscmpeqdp, 0x0C, 0x00, 0, PPC2_ISA300)
-GEN_VSX_HELPER_X3(xscmpgtdp, 0x0C, 0x01, 0, PPC2_ISA300)
-GEN_VSX_HELPER_X3(xscmpgedp, 0x0C, 0x02, 0, PPC2_ISA300)
-GEN_VSX_HELPER_X3(xscmpnedp, 0x0C, 0x03, 0, PPC2_ISA300)
GEN_VSX_HELPER_X2_AB(xscmpexpdp, 0x0C, 0x07, 0, PPC2_ISA300)
GEN_VSX_HELPER_R2_AB(xscmpexpqp, 0x04, 0x05, 0, PPC2_ISA300)
GEN_VSX_HELPER_X2_AB(xscmpodp, 0x0C, 0x05, 0, PPC2_VSX)
@@ -1183,6 +1179,10 @@ static bool do_helper_XX3(DisasContext *ctx, arg_XX3 *a,
TRANS(XXPERM, do_helper_XX3, gen_helper_VPERM);
TRANS(XXPERMR, do_helper_XX3, gen_helper_VPERMR);
+TRANS(XSCMPEQDP, do_helper_XX3, gen_helper_XSCMPEQDP)
+TRANS(XSCMPGEDP, do_helper_XX3, gen_helper_XSCMPGEDP)
+TRANS(XSCMPGTDP, do_helper_XX3, gen_helper_XSCMPGTDP)
+TRANS(XSCMPNEDP, do_helper_XX3, gen_helper_XSCMPNEDP)
static bool trans_XXPERMDI(DisasContext *ctx, arg_XX3_dm *a)
{
diff --git a/target/ppc/translate/vsx-ops.c.inc
b/target/ppc/translate/vsx-ops.c.inc
index 9cfec53df0..b8fd116728 100644
--- a/target/ppc/translate/vsx-ops.c.inc
+++ b/target/ppc/translate/vsx-ops.c.inc
@@ -186,10 +186,6 @@ GEN_XX2FORM(xssqrtdp, 0x16, 0x04, PPC2_VSX),
GEN_XX2FORM(xsrsqrtedp, 0x14, 0x04, PPC2_VSX),
GEN_XX3FORM(xstdivdp, 0x14, 0x07, PPC2_VSX),
GEN_XX2FORM(xstsqrtdp, 0x14, 0x06, PPC2_VSX),
-GEN_XX3FORM(xscmpeqdp, 0x0C, 0x00, PPC2_ISA300),
-GEN_XX3FORM(xscmpgtdp, 0x0C, 0x01, PPC2_ISA300),
-GEN_XX3FORM(xscmpgedp, 0x0C, 0x02, PPC2_ISA300),
-GEN_XX3FORM(xscmpnedp, 0x0C, 0x03, PPC2_ISA300),
GEN_XX3FORM(xscmpexpdp, 0x0C, 0x07, PPC2_ISA300),
GEN_VSX_XFORM_300(xscmpexpqp, 0x04, 0x05, 0x00600001),
GEN_XX2IFORM(xscmpodp, 0x0C, 0x05, PPC2_VSX),
--
2.25.1
- [PATCH 25/37] target/ppc: Implement xxeval, (continued)
- [PATCH 25/37] target/ppc: Implement xxeval, matheus . ferst, 2022/01/07
- [PATCH 23/37] target/ppc: Implement xxpermx instruction, matheus . ferst, 2022/01/07
- [PATCH 24/37] tcg/tcg-op-gvec.c: Introduce tcg_gen_gvec_4i, matheus . ferst, 2022/01/07
- [PATCH 26/37] target/ppc: Implement xxgenpcv[bhwd]m instruction, matheus . ferst, 2022/01/07
- [PATCH 27/37] target/ppc: move xs[n]madd[am][ds]p/xs[n]msub[am][ds]p to decodetree, matheus . ferst, 2022/01/07
- [PATCH 28/37] target/ppc: implement xs[n]maddqp[o]/xs[n]msubqp[o], matheus . ferst, 2022/01/07
- [PATCH 29/37] target/ppc: Implement xvtlsbb instruction, matheus . ferst, 2022/01/07
- [PATCH 30/37] target/ppc: Refactor VSX_SCALAR_CMP_DP, matheus . ferst, 2022/01/07
- [PATCH 31/37] target/ppc: Implement xscmp{eq,ge,gt}qp, matheus . ferst, 2022/01/07
- [PATCH 32/37] target/ppc: Implement do_helper_XX3 and move xxperm* to use it, matheus . ferst, 2022/01/07
- [PATCH 33/37] target/ppc: Move xscmp{eq,ge,gt,ne}dp to decodetree,
matheus . ferst <=
- [PATCH 34/37] target/ppc: Move xs{max, min}[cj]dp to use do_helper_XX3, matheus . ferst, 2022/01/07
- [PATCH 35/37] target/ppc: Refactor VSX_MAX_MINC helper, matheus . ferst, 2022/01/07
- [PATCH 36/37] target/ppc: Implement xs{max,min}cqp, matheus . ferst, 2022/01/07
- [PATCH 37/37] target/ppc: Implement xvcvbf16spn and xvcvspbf16 instructions, matheus . ferst, 2022/01/07
- Re: [PATCH 00/37] target/ppc: PowerISA Vector/VSX instruction batch, Daniel Henrique Barboza, 2022/01/10
- Re: [PATCH 00/37] target/ppc: PowerISA Vector/VSX instruction batch, Cédric Le Goater, 2022/01/24