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[PULL 06/26] target/ppc: Improve logging in Radix MMU
From: |
Cédric Le Goater |
Subject: |
[PULL 06/26] target/ppc: Improve logging in Radix MMU |
Date: |
Tue, 4 Jan 2022 08:31:01 +0100 |
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211222071002.1568894-1-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/mmu-radix64.c | 55 +++++++++++++++++++++++++++++++++++++---
1 file changed, 52 insertions(+), 3 deletions(-)
diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c
index 5b0e62e676dc..d10ae001d7c9 100644
--- a/target/ppc/mmu-radix64.c
+++ b/target/ppc/mmu-radix64.c
@@ -97,12 +97,22 @@ static void ppc_radix64_raise_segi(PowerPCCPU *cpu,
MMUAccessType access_type,
env->error_code = 0;
}
+static inline const char *access_str(MMUAccessType access_type)
+{
+ return access_type == MMU_DATA_LOAD ? "reading" :
+ (access_type == MMU_DATA_STORE ? "writing" : "execute");
+}
+
static void ppc_radix64_raise_si(PowerPCCPU *cpu, MMUAccessType access_type,
vaddr eaddr, uint32_t cause)
{
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
+ qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx" cause %08x\n",
+ __func__, access_str(access_type),
+ eaddr, cause);
+
switch (access_type) {
case MMU_INST_FETCH:
/* Instruction Storage Interrupt */
@@ -130,6 +140,11 @@ static void ppc_radix64_raise_hsi(PowerPCCPU *cpu,
MMUAccessType access_type,
CPUState *cs = CPU(cpu);
CPUPPCState *env = &cpu->env;
+ qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx" 0x%"
+ HWADDR_PRIx" cause %08x\n",
+ __func__, access_str(access_type),
+ eaddr, g_raddr, cause);
+
switch (access_type) {
case MMU_INST_FETCH:
/* H Instruction Storage Interrupt */
@@ -306,6 +321,15 @@ static int ppc_radix64_partition_scoped_xlate(PowerPCCPU
*cpu,
hwaddr pte_addr;
uint64_t pte;
+ qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx
+ " mmu_idx %u (prot %c%c%c) 0x%"HWADDR_PRIx"\n",
+ __func__, access_str(access_type),
+ eaddr, mmu_idx,
+ *h_prot & PAGE_READ ? 'r' : '-',
+ *h_prot & PAGE_WRITE ? 'w' : '-',
+ *h_prot & PAGE_EXEC ? 'x' : '-',
+ g_raddr);
+
*h_page_size = PRTBE_R_GET_RTS(pate.dw0);
/* No valid pte or access denied due to protection */
if (ppc_radix64_walk_tree(CPU(cpu)->as, g_raddr, pate.dw0 & PRTBE_R_RPDB,
@@ -343,6 +367,11 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU
*cpu,
hwaddr h_raddr, pte_addr;
int ret;
+ qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx
+ " mmu_idx %u pid %"PRIu64"\n",
+ __func__, access_str(access_type),
+ eaddr, mmu_idx, pid);
+
/* Index Process Table by PID to Find Corresponding Process Table Entry */
offset = pid * sizeof(struct prtb_entry);
size = 1ULL << ((pate.dw1 & PATE1_R_PRTS) + 12);
@@ -468,9 +497,10 @@ static int ppc_radix64_process_scoped_xlate(PowerPCCPU
*cpu,
* | = On | Process Scoped | Scoped |
* +-------------+----------------+---------------+
*/
-bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
- hwaddr *raddr, int *psizep, int *protp, int mmu_idx,
- bool guest_visible)
+static bool ppc_radix64_xlate_impl(PowerPCCPU *cpu, vaddr eaddr,
+ MMUAccessType access_type, hwaddr *raddr,
+ int *psizep, int *protp, int mmu_idx,
+ bool guest_visible)
{
CPUPPCState *env = &cpu->env;
uint64_t lpid, pid;
@@ -588,3 +618,22 @@ bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr,
MMUAccessType access_type,
return true;
}
+
+bool ppc_radix64_xlate(PowerPCCPU *cpu, vaddr eaddr, MMUAccessType access_type,
+ hwaddr *raddrp, int *psizep, int *protp, int mmu_idx,
+ bool guest_visible)
+{
+ bool ret = ppc_radix64_xlate_impl(cpu, eaddr, access_type, raddrp,
+ psizep, protp, mmu_idx, guest_visible);
+
+ qemu_log_mask(CPU_LOG_MMU, "%s for %s @0x%"VADDR_PRIx
+ " mmu_idx %u (prot %c%c%c) -> 0x%"HWADDR_PRIx"\n",
+ __func__, access_str(access_type),
+ eaddr, mmu_idx,
+ *protp & PAGE_READ ? 'r' : '-',
+ *protp & PAGE_WRITE ? 'w' : '-',
+ *protp & PAGE_EXEC ? 'x' : '-',
+ *raddrp);
+
+ return ret;
+}
--
2.31.1
- [PULL 19/26] target/ppc: powerpc_excp: Add excp_vectors bounds check, (continued)
- [PULL 19/26] target/ppc: powerpc_excp: Add excp_vectors bounds check, Cédric Le Goater, 2022/01/04
- [PULL 24/26] target/ppc: Rewrite pmu_increment_insns, Cédric Le Goater, 2022/01/04
- [PULL 16/26] ppc/ppc405: Dump specific registers, Cédric Le Goater, 2022/01/04
- [PULL 07/26] target/ppc: Check effective address validity, Cédric Le Goater, 2022/01/04
- [PULL 21/26] target/ppc: powerpc_excp: Move system call vectored code together, Cédric Le Goater, 2022/01/04
- [PULL 17/26] target/ppc: do not silence snan in xscvspdpn, Cédric Le Goater, 2022/01/04
- [PULL 14/26] ppc/ppc405: Fix timer initialization, Cédric Le Goater, 2022/01/04
- [PULL 20/26] target/ppc: powerpc_excp: Set vector earlier, Cédric Le Goater, 2022/01/04
- [PULL 11/26] ppc/ppc405: Activate MMU logs, Cédric Le Goater, 2022/01/04
- [PULL 05/26] pnv_phb4.c: do not set 'root-bus' as bus name, Cédric Le Goater, 2022/01/04
- [PULL 06/26] target/ppc: Improve logging in Radix MMU,
Cédric Le Goater <=
- [PULL 13/26] ppc/ppc405: Rework ppc_40x_timers_init() to use a PowerPCCPU, Cédric Le Goater, 2022/01/04
- [PULL 12/26] ppc/ppc405: Restore TCR and STR write handlers, Cédric Le Goater, 2022/01/04
- [PULL 10/26] ppc/ppc4xx: Convert printfs(), Cédric Le Goater, 2022/01/04
- [PULL 18/26] target/ppc: powerpc_excp: Set alternate SRRs directly, Cédric Le Goater, 2022/01/04
- [PULL 08/26] target/ppc: Remove static inline, Cédric Le Goater, 2022/01/04
- [PULL 09/26] target/ppc: Print out literal exception names in logs, Cédric Le Goater, 2022/01/04
- [PULL 02/26] ppc/pnv: Remove PHB4 reset handler, Cédric Le Goater, 2022/01/04
- [PULL 23/26] target/ppc: Cache per-pmc insn and cycle count settings, Cédric Le Goater, 2022/01/04