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Re: [PATCH v3 2/2] target/ppc: fix vector registers access in gdbstub fo
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [PATCH v3 2/2] target/ppc: fix vector registers access in gdbstub for little-endian |
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Date: |
Thu, 26 Aug 2021 17:17:40 +0200 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 8/26/21 4:56 PM, matheus.ferst@eldorado.org.br wrote:
> From: Matheus Ferst <matheus.ferst@eldorado.org.br>
>
> As vector registers are stored in host endianness, we shouldn't swap its
> 64-bit elements in user mode. Add a 16-byte case in
> ppc_maybe_bswap_register to handle the reordering of elements in softmmu
> and remove avr_need_swap which is now unused.
>
> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
> ---
> The fix of the order of Int128 fields is in the based-on patchset.
> ---
> target/ppc/gdbstub.c | 32 +++++++-------------------------
> 1 file changed, 7 insertions(+), 25 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>