Re: [PATCH for-6.2 07/43] target/ppc: Set fault address in ppc_cpu_do_unaligned_access

[Cédric Le Goater]

On 7/29/21 8:05 PM, Richard Henderson wrote:
> On 7/29/21 3:44 AM, Peter Maydell wrote:
>> On Thu, 29 Jul 2021 at 01:51, Richard Henderson
>> <richard.henderson@linaro.org> wrote:
>>>
>>> We ought to have been recording the virtual address for reporting
>>> to the guest trap handler.
>>>
>>> Cc: qemu-ppc@nongnu.org
>>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>>> ---
>>>   target/ppc/excp_helper.c | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
>>> index a79a0ed465..0b2c6de442 100644
>>> --- a/target/ppc/excp_helper.c
>>> +++ b/target/ppc/excp_helper.c
>>> @@ -1503,6 +1503,8 @@ void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr 
>>> vaddr,
>>>       CPUPPCState *env = cs->env_ptr;
>>>       uint32_t insn;
>>>
>>> +    env->spr[SPR_DAR] = vaddr;
>>> +
>>
>> Is this the right SPR for all PPC variants? For instance the
>> kernel's code in arch/powerpc/kernel/exceptions-64e.S looks
>> in SPRN_DEAR, which is our SPR_BOOKE_DEAR or SPR_40x_DEAR.

Indeed :/

> I have no idea.  I glanced through a handful of the mmu's, and looked at the 
> current BookS docs, but that's certainly not all.

I took a look at some more and for instance, e300 uses DAR and e500, 405, 476 
use DEAR. 

DAR should be consistent over the server processors.

C.

> 
> I'll note that if we do need to set different regs for different mmus, we'll 
> probably want to standardize on this one for user-only, like we did for the 
> user-only copy of ppc_cpu_tlb_fill.
> 
> 
> r~
>