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[PULL 43/46] target/ppc: removed VSCR from SPR registration
From: |
David Gibson |
Subject: |
[PULL 43/46] target/ppc: removed VSCR from SPR registration |
Date: |
Tue, 4 May 2021 15:53:09 +1000 |
From: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
Since vscr is not an spr, its initialization was removed from the
spr registration functions, and moved to the relevant init_procs.
We may look into adding vscr to the reset path instead of the init
path (as suggested by David Gibson), but this looked like a good
enough solution for now.
Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
Message-Id: <20210430193533.82136-6-bruno.larsen@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/translate_init.c.inc | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/target/ppc/translate_init.c.inc b/target/ppc/translate_init.c.inc
index 5cee94f16d..66e6a4a746 100644
--- a/target/ppc/translate_init.c.inc
+++ b/target/ppc/translate_init.c.inc
@@ -1693,8 +1693,6 @@ static void gen_spr_74xx(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_generic, spr_access_nop,
0x00000000);
- /* Not strictly an SPR */
- vscr_init(env, 0x00010000);
}
static void gen_l3_ctrl(CPUPPCState *env)
@@ -6618,6 +6616,7 @@ static void init_proc_7400(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* XXX : not implemented */
spr_register(env, SPR_UBAMR, "UBAMR",
&spr_read_ureg, SPR_NOACCESS,
@@ -6697,6 +6696,7 @@ static void init_proc_7410(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* XXX : not implemented */
spr_register(env, SPR_UBAMR, "UBAMR",
&spr_read_ureg, SPR_NOACCESS,
@@ -6782,6 +6782,7 @@ static void init_proc_7440(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* XXX : not implemented */
spr_register(env, SPR_UBAMR, "UBAMR",
&spr_read_ureg, SPR_NOACCESS,
@@ -6890,6 +6891,7 @@ static void init_proc_7450(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* Level 3 cache control */
gen_l3_ctrl(env);
/* L3ITCR1 */
@@ -7024,6 +7026,7 @@ static void init_proc_7445(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* LDSTCR */
/* XXX : not implemented */
spr_register(env, SPR_LDSTCR, "LDSTCR",
@@ -7161,6 +7164,7 @@ static void init_proc_7455(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* Level 3 cache control */
gen_l3_ctrl(env);
/* LDSTCR */
@@ -7300,6 +7304,7 @@ static void init_proc_7457(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* Level 3 cache control */
gen_l3_ctrl(env);
/* L3ITCR1 */
@@ -7463,6 +7468,7 @@ static void init_proc_e600(CPUPPCState *env)
gen_tbl(env);
/* 74xx specific SPR */
gen_spr_74xx(env);
+ vscr_init(env, 0x00010000);
/* XXX : not implemented */
spr_register(env, SPR_UBAMR, "UBAMR",
&spr_read_ureg, SPR_NOACCESS,
@@ -7713,11 +7719,6 @@ static void gen_spr_book3s_altivec(CPUPPCState *env)
&spr_read_generic, &spr_write_generic,
KVM_REG_PPC_VRSAVE, 0x00000000);
- /*
- * Can't find information on what this should be on reset. This
- * value is the one used by 74xx processors.
- */
- vscr_init(env, 0x00010000);
}
static void gen_spr_book3s_dbg(CPUPPCState *env)
@@ -8415,6 +8416,11 @@ static void init_proc_book3s_common(CPUPPCState *env)
gen_spr_book3s_pmu_sup(env);
gen_spr_book3s_pmu_user(env);
gen_spr_book3s_ctrl(env);
+ /*
+ * Can't find information on what this should be on reset. This
+ * value is the one used by 74xx processors.
+ */
+ vscr_init(env, 0x00010000);
}
static void init_proc_970(CPUPPCState *env)
--
2.31.1
- [PULL 32/46] target/ppc: POWER10 supports scv, (continued)
- [PULL 32/46] target/ppc: POWER10 supports scv, David Gibson, 2021/05/04
- [PULL 35/46] spapr.h: increase FDT_MAX_SIZE, David Gibson, 2021/05/04
- [PULL 36/46] spapr_drc.c: handle hotunplug errors in drc_unisolate_logical(), David Gibson, 2021/05/04
- [PULL 39/46] target/ppc: rework AIL logic in interrupt delivery, David Gibson, 2021/05/04
- [PULL 38/46] target/ppc: move opcode table logic to translate.c, David Gibson, 2021/05/04
- [PULL 37/46] target/ppc: code motion from translate_init.c.inc to gdbstub.c, David Gibson, 2021/05/04
- [PULL 40/46] target/ppc: Add POWER10 exception model, David Gibson, 2021/05/04
- [PULL 44/46] hw/intc/spapr_xive: Use device_cold_reset() instead of device_legacy_reset(), David Gibson, 2021/05/04
- [PULL 41/46] target/ppc: Clean up _spr_register et al, David Gibson, 2021/05/04
- [PULL 42/46] target/ppc: Reduce the size of ppc_spr_t, David Gibson, 2021/05/04
- [PULL 43/46] target/ppc: removed VSCR from SPR registration,
David Gibson <=
- [PULL 45/46] hw/ppc/spapr_vio: Reset TCE table object with device_cold_reset(), David Gibson, 2021/05/04
- [PULL 46/46] hw/ppc/pnv_psi: Use device_cold_reset() instead of device_legacy_reset(), David Gibson, 2021/05/04
- Re: [PULL 00/46] ppc-for-6.1 queue 20210504, Peter Maydell, 2021/05/06