[PATCH v2 0/7] Add several Power ISA 3.1 32/64-bit vector instructions

[Lijun Pan]

This patch series add several newly introduced 32/64-bit vector
instructions in Power ISA 3.1. Power ISA 3.1 flag is introduced in
this version. Coding style issues are fixed in this version.

Lijun Pan (7):
  target/ppc: Introduce Power ISA 3.1 flag
  target/ppc: add byte-reverse br[dwh] instructions
  target/ppc: add vmulld instruction
  target/ppc: add vmulh{su}w instructions
  fix the prototype of muls64/mulu64
  target/ppc: add vmulh{su}d instructions
  target/ppc: add vdiv{su}{wd} vmod{su}{wd} instructions

 include/qemu/host-utils.h           |  4 +-
 target/ppc/cpu.h                    |  4 +-
 target/ppc/helper.h                 | 13 ++++++
 target/ppc/int_helper.c             | 58 +++++++++++++++++++++++++
 target/ppc/translate.c              | 65 +++++++++++++++++++++++++++++
 target/ppc/translate/vmx-impl.inc.c | 24 +++++++++++
 target/ppc/translate/vmx-ops.inc.c  | 27 ++++++++++--
 target/ppc/translate_init.inc.c     |  2 +-
 8 files changed, 189 insertions(+), 8 deletions(-)

-- 
2.23.0