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Re: [PATCH] spapr: Fix typos in comments and macro indentation
From: |
David Gibson |
Subject: |
Re: [PATCH] spapr: Fix typos in comments and macro indentation |
Date: |
Mon, 15 Jun 2020 14:01:43 +1000 |
On Thu, May 28, 2020 at 08:04:41PM -0400, Gustavo Romero wrote:
> This commit fixes typos in spapr_vio_reg_to_irq() comments and a macro
> indentation.
>
> Signed-off-by: Gustavo Romero <gromero@linux.ibm.com>
Applied to ppc-for-5.1.
In future, please CC me on patches for ppc code - I only occasionally
scan the list.
> ---
> hw/ppc/spapr_vio.c | 6 +++---
> include/hw/ppc/xive_regs.h | 2 +-
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c
> index 0b085ea..741fdbf 100644
> --- a/hw/ppc/spapr_vio.c
> +++ b/hw/ppc/spapr_vio.c
> @@ -420,7 +420,7 @@ static void spapr_vio_busdev_reset(DeviceState *qdev)
> }
>
> /*
> - * The register property of a VIO device is defined in livirt using
> + * The register property of a VIO device is defined in libvirt using
> * 0x1000 as a base register number plus a 0x1000 increment. For the
> * VIO tty device, the base number is changed to 0x30000000. QEMU uses
> * a base register number of 0x71000000 and then a simple increment.
> @@ -450,7 +450,7 @@ static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
>
> } else if (reg >= 0x30000000) {
> /*
> - * VIO tty devices register values, when allocated by livirt,
> + * VIO tty devices register values, when allocated by libvirt,
> * are mapped in range [0xf0 - 0xff], gives us a maximum of 16
> * vtys.
> */
> @@ -459,7 +459,7 @@ static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
> } else {
> /*
> * Other VIO devices register values, when allocated by
> - * livirt, should be mapped in range [0x00 - 0xef]. Conflicts
> + * libvirt, should be mapped in range [0x00 - 0xef]. Conflicts
> * will be detected when IRQ is claimed.
> */
> irq = (reg >> 12) & 0xff;
> diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h
> index 09f2436..7879692 100644
> --- a/include/hw/ppc/xive_regs.h
> +++ b/include/hw/ppc/xive_regs.h
> @@ -71,7 +71,7 @@
> * QW word 2 contains the valid bit at the top and other fields
> * depending on the QW.
> */
> -#define TM_WORD2 0x8
> +#define TM_WORD2 0x8
> #define TM_QW0W2_VU PPC_BIT32(0)
> #define TM_QW0W2_LOGIC_SERV PPC_BITMASK32(1, 31) /* XX 2,31 ? */
> #define TM_QW1W2_VO PPC_BIT32(0)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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