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Re: [PATCH v2 4/5] mac_oldworld: Rename ppc_heathrow_reset reset to ppc_


From: BALATON Zoltan
Subject: Re: [PATCH v2 4/5] mac_oldworld: Rename ppc_heathrow_reset reset to ppc_heathrow_cpu_reset
Date: Sun, 14 Jun 2020 16:17:21 +0200 (CEST)
User-agent: Alpine 2.22 (BSF 395 2020-01-19)

On Sun, 14 Jun 2020, Mark Cave-Ayland wrote:
On 13/06/2020 14:36, BALATON Zoltan wrote:

This function resets a CPU not the whole machine so reflect that in
its name.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
---
 hw/ppc/mac_oldworld.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index 4dd872c1a3..9138752ccb 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -73,7 +73,7 @@ static uint64_t translate_kernel_address(void *opaque, 
uint64_t addr)
     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
 }

-static void ppc_heathrow_reset(void *opaque)
+static void ppc_heathrow_cpu_reset(void *opaque)
 {
     PowerPCCPU *cpu = opaque;

@@ -127,7 +127,7 @@ static void ppc_heathrow_init(MachineState *machine)

         /* Set time-base frequency to 16.6 Mhz */
         cpu_ppc_tb_init(env,  TBFREQ);
-        qemu_register_reset(ppc_heathrow_reset, cpu);
+        qemu_register_reset(ppc_heathrow_cpu_reset, cpu);
     }

     /* allocate RAM */

Technically this is a board level reset which just happens to pass the CPU for 
the
opaque, so I'm not quite sold on this one (as an example look at mac_newworld.c 
where
using the ELF load address for the PROM would require a dynamic NIP which is 
most
conveniently accessed via a MachineState).

The mac_newworld also registers a per CPU reset function like this one. This could be done in the machine level reset I add in next patch but there could be multiple CPUs and I don't know how to access those from MachineState so I've left this CPU reset functions alone which could be cleaned up later.

Ideally I should not need a machine reset to set the initial BAR mapping but otherwise the sequence of registered reset funcs are not guaranteed and the PCI device is reset during qemu_devices_reset() which clears the BARs so it won't stay mapped otherwise. I could not find an easier way to map this BAR.

Regards,
BALATON Zoltan



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