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[PATCH v2 09/13] ppc/pnv: Add an "nr-threads" property to the base chip
From: |
Cédric Le Goater |
Subject: |
[PATCH v2 09/13] ppc/pnv: Add an "nr-threads" property to the base chip class |
Date: |
Thu, 19 Dec 2019 19:11:51 +0100 |
From: Greg Kurz <address@hidden>
Set it at chip creation and forward it to the cores. This allows to drop
a call to qdev_get_machine().
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: Cédric Le Goater <address@hidden>
---
include/hw/ppc/pnv.h | 1 +
hw/ppc/pnv.c | 8 +++++---
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 8b957dfb5736..4c13d4394a11 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -48,6 +48,7 @@ typedef struct PnvChip {
uint64_t ram_size;
uint32_t nr_cores;
+ uint32_t nr_threads;
uint64_t cores_mask;
PnvCore **cores;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 915c80a24b3e..e638cdc93091 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -791,6 +791,8 @@ static void pnv_init(MachineState *machine)
&error_fatal);
object_property_set_int(chip, machine->smp.cores,
"nr-cores", &error_fatal);
+ object_property_set_int(chip, machine->smp.threads,
+ "nr-threads", &error_fatal);
/*
* TODO: Only the MMIO range should be of interest for the
* controllers
@@ -1529,7 +1531,6 @@ static void pnv_chip_core_sanitize(PnvChip *chip, Error
**errp)
static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
{
- MachineState *ms = MACHINE(qdev_get_machine());
Error *error = NULL;
PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
const char *typename = pnv_chip_core_typename(chip);
@@ -1565,8 +1566,8 @@ static void pnv_chip_core_realize(PnvChip *chip, Error
**errp)
object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
&error_abort);
chip->cores[i] = pnv_core;
- object_property_set_int(OBJECT(pnv_core), ms->smp.threads,
"nr-threads",
- &error_fatal);
+ object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
+ "nr-threads", &error_fatal);
object_property_set_int(OBJECT(pnv_core), core_hwid,
CPU_CORE_PROP_CORE_ID, &error_fatal);
object_property_set_int(OBJECT(pnv_core),
@@ -1609,6 +1610,7 @@ static Property pnv_chip_properties[] = {
DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
DEFINE_PROP_LINK("system-memory", PnvChip, system_memory,
TYPE_MEMORY_REGION, MemoryRegion *),
+ DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
DEFINE_PROP_END_OF_LIST(),
};
--
2.21.0
- [PATCH v2 04/13] ppc/pnv: Introduce a "xics" property under the POWER8 chip, (continued)
- [PATCH v2 04/13] ppc/pnv: Introduce a "xics" property under the POWER8 chip, Cédric Le Goater, 2019/12/19
- [PATCH v2 05/13] spapr/xive: Use device_class_set_parent_realize(), Cédric Le Goater, 2019/12/19
- [PATCH v2 06/13] pnv/xive: Use device_class_set_parent_realize(), Cédric Le Goater, 2019/12/19
- [PATCH v2 07/13] spapr, pnv, xive: Add a "xive-fabric" link to the XIVE router, Cédric Le Goater, 2019/12/19
- [PATCH v2 08/13] xive: Use the XIVE fabric link under the XIVE router, Cédric Le Goater, 2019/12/19
- [PATCH v2 09/13] ppc/pnv: Add an "nr-threads" property to the base chip class,
Cédric Le Goater <=
- [PATCH v2 10/13] ppc/pnv: Add a "pnor" const link property to the BMC internal simulator, Cédric Le Goater, 2019/12/19
- [PATCH v2 11/13] xive: Add a "presenter" link property to the TCTX object, Cédric Le Goater, 2019/12/19
- [PATCH v2 12/13] spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr, Cédric Le Goater, 2019/12/19
- [PATCH v2 13/13] pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr, Cédric Le Goater, 2019/12/19
- Re: [PATCH v2 00/13] ppc/pnv: remove the use of qdev_get_machine() and get_system_memory(), David Gibson, 2019/12/23