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[PULL 86/88] ppc/pnv: Introduce PnvChipClass::xscom_pcba() method
From: |
David Gibson |
Subject: |
[PULL 86/88] ppc/pnv: Introduce PnvChipClass::xscom_pcba() method |
Date: |
Tue, 17 Dec 2019 15:43:20 +1100 |
From: Greg Kurz <address@hidden>
The XSCOM bus is implemented with a QOM interface, which is mostly
generic from a CPU type standpoint, except for the computation of
addresses on the Pervasive Connect Bus (PCB) network. This is handled
by the pnv_xscom_pcba() function with a switch statement based on
the chip_type class level attribute of the CPU chip.
This can be achieved using QOM. Also the address argument is masked with
PNV_XSCOM_SIZE - 1, which is for POWER8 only. Addresses may have different
sizes with other CPU types. Have each CPU chip type handle the appropriate
computation with a QOM xscom_pcba() method.
Signed-off-by: Greg Kurz <address@hidden>
Message-Id: <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv.c | 23 +++++++++++++++++++++++
hw/ppc/pnv_xscom.c | 14 +-------------
include/hw/ppc/pnv.h | 1 +
3 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index b3388038c6..41e5d762df 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1120,6 +1120,12 @@ static void pnv_chip_power8_realize(DeviceState *dev,
Error **errp)
&chip8->homer.regs);
}
+static uint32_t pnv_chip_power8_xscom_pcba(PnvChip *chip, uint64_t addr)
+{
+ addr &= (PNV_XSCOM_SIZE - 1);
+ return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
+}
+
static void pnv_chip_power8e_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1137,6 +1143,7 @@ static void pnv_chip_power8e_class_init(ObjectClass
*klass, void *data)
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
k->xscom_core_base = pnv_chip_power8_xscom_core_base;
+ k->xscom_pcba = pnv_chip_power8_xscom_pcba;
dc->desc = "PowerNV Chip POWER8E";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1160,6 +1167,7 @@ static void pnv_chip_power8_class_init(ObjectClass
*klass, void *data)
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
k->xscom_core_base = pnv_chip_power8_xscom_core_base;
+ k->xscom_pcba = pnv_chip_power8_xscom_pcba;
dc->desc = "PowerNV Chip POWER8";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1183,6 +1191,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass
*klass, void *data)
k->dt_populate = pnv_chip_power8_dt_populate;
k->pic_print_info = pnv_chip_power8_pic_print_info;
k->xscom_core_base = pnv_chip_power8_xscom_core_base;
+ k->xscom_pcba = pnv_chip_power8_xscom_pcba;
dc->desc = "PowerNV Chip POWER8NVL";
device_class_set_parent_realize(dc, pnv_chip_power8_realize,
@@ -1339,6 +1348,12 @@ static void pnv_chip_power9_realize(DeviceState *dev,
Error **errp)
&chip9->homer.regs);
}
+static uint32_t pnv_chip_power9_xscom_pcba(PnvChip *chip, uint64_t addr)
+{
+ addr &= (PNV9_XSCOM_SIZE - 1);
+ return addr >> 3;
+}
+
static void pnv_chip_power9_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1356,6 +1371,7 @@ static void pnv_chip_power9_class_init(ObjectClass
*klass, void *data)
k->dt_populate = pnv_chip_power9_dt_populate;
k->pic_print_info = pnv_chip_power9_pic_print_info;
k->xscom_core_base = pnv_chip_power9_xscom_core_base;
+ k->xscom_pcba = pnv_chip_power9_xscom_pcba;
dc->desc = "PowerNV Chip POWER9";
device_class_set_parent_realize(dc, pnv_chip_power9_realize,
@@ -1421,6 +1437,12 @@ static void pnv_chip_power10_realize(DeviceState *dev,
Error **errp)
(uint64_t) PNV10_LPCM_BASE(chip));
}
+static uint32_t pnv_chip_power10_xscom_pcba(PnvChip *chip, uint64_t addr)
+{
+ addr &= (PNV10_XSCOM_SIZE - 1);
+ return addr >> 3;
+}
+
static void pnv_chip_power10_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -1438,6 +1460,7 @@ static void pnv_chip_power10_class_init(ObjectClass
*klass, void *data)
k->dt_populate = pnv_chip_power10_dt_populate;
k->pic_print_info = pnv_chip_power10_pic_print_info;
k->xscom_core_base = pnv_chip_power10_xscom_core_base;
+ k->xscom_pcba = pnv_chip_power10_xscom_pcba;
dc->desc = "PowerNV Chip POWER10";
device_class_set_parent_realize(dc, pnv_chip_power10_realize,
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index 5ae9dfbb88..b681c72575 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -57,19 +57,7 @@ static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
{
- addr &= (PNV_XSCOM_SIZE - 1);
-
- switch (PNV_CHIP_GET_CLASS(chip)->chip_type) {
- case PNV_CHIP_POWER8E:
- case PNV_CHIP_POWER8:
- case PNV_CHIP_POWER8NVL:
- return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
- case PNV_CHIP_POWER9:
- case PNV_CHIP_POWER10:
- return addr >> 3;
- default:
- g_assert_not_reached();
- }
+ return PNV_CHIP_GET_CLASS(chip)->xscom_pcba(chip, addr);
}
static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 7a134a15d3..4972e93c26 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -138,6 +138,7 @@ typedef struct PnvChipClass {
void (*dt_populate)(PnvChip *chip, void *fdt);
void (*pic_print_info)(PnvChip *chip, Monitor *mon);
uint64_t (*xscom_core_base)(PnvChip *chip, uint32_t core_id);
+ uint32_t (*xscom_pcba)(PnvChip *chip, uint64_t addr);
} PnvChipClass;
#define PNV_CHIP_TYPE_SUFFIX "-" TYPE_PNV_CHIP
--
2.23.0
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, (continued)
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, David Gibson, 2019/12/16
- [PULL 80/88] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 76/88] ppc/pnv: Introduce PnvPsiClass::compat, David Gibson, 2019/12/16
- [PULL 77/88] ppc/pnv: Drop PnvPsiClass::chip_type, David Gibson, 2019/12/16
- [PULL 84/88] ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method, David Gibson, 2019/12/16
- [PULL 78/88] ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat, David Gibson, 2019/12/16
- [PULL 79/88] ppc/pnv: Introduce PnvMachineClass::dt_power_mgt(), David Gibson, 2019/12/16
- [PULL 85/88] ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 73/88] ppc/pnv: Introduce PBA registers, David Gibson, 2019/12/16
- [PULL 86/88] ppc/pnv: Introduce PnvChipClass::xscom_pcba() method,
David Gibson <=
- [PULL 87/88] ppc/pnv: Drop PnvChipClass::type, David Gibson, 2019/12/16
- [PULL 88/88] pseries: Update SLOF firmware image, David Gibson, 2019/12/16
- Re: [PULL 00/88] ppc-for-5.0 queue 20191217, Peter Maydell, 2019/12/17