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[PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support
From: |
David Gibson |
Subject: |
[PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support |
Date: |
Tue, 17 Dec 2019 15:43:01 +1100 |
From: Suraj Jitindar Singh <address@hidden>
The Processor Utilisation of Resources Register (PURR) and Scaled
Processor Utilisation of Resources Register (SPURR) provide an estimate
of the resources used by the thread, present on POWER7 and later
processors.
Currently the [S]PURR registers simply count at the rate of the
timebase.
Preserve this behaviour but rework the implementation to store an offset
like the timebase rather than doing the calculation manually. Also allow
hypervisor write access to the register along with the currently
available read access.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Reviewed-by: David Gibson <address@hidden>
[ clg: rebased on current ppc tree ]
Signed-off-by: Cédric Le Goater <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/ppc.c | 17 +++++++----------
include/hw/ppc/ppc.h | 3 +--
target/ppc/cpu.h | 1 +
target/ppc/helper.h | 1 +
target/ppc/timebase_helper.c | 5 +++++
target/ppc/translate_init.inc.c | 23 +++++++++++++++--------
6 files changed, 30 insertions(+), 20 deletions(-)
diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
index d8c402811f..2856d69495 100644
--- a/hw/ppc/ppc.c
+++ b/hw/ppc/ppc.c
@@ -809,12 +809,9 @@ target_ulong cpu_ppc_load_hdecr(CPUPPCState *env)
uint64_t cpu_ppc_load_purr (CPUPPCState *env)
{
ppc_tb_t *tb_env = env->tb_env;
- uint64_t diff;
- diff = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - tb_env->purr_start;
-
- return tb_env->purr_load +
- muldiv64(diff, tb_env->tb_freq, NANOSECONDS_PER_SECOND);
+ return cpu_ppc_get_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
+ tb_env->purr_offset);
}
/* When decrementer expires,
@@ -973,12 +970,12 @@ static void cpu_ppc_hdecr_cb(void *opaque)
cpu_ppc_hdecr_excp(cpu);
}
-static void cpu_ppc_store_purr(PowerPCCPU *cpu, uint64_t value)
+void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value)
{
- ppc_tb_t *tb_env = cpu->env.tb_env;
+ ppc_tb_t *tb_env = env->tb_env;
- tb_env->purr_load = value;
- tb_env->purr_start = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
+ cpu_ppc_store_tb(tb_env, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
+ &tb_env->purr_offset, value);
}
static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
@@ -995,7 +992,7 @@ static void cpu_ppc_set_tb_clk (void *opaque, uint32_t freq)
*/
_cpu_ppc_store_decr(cpu, 0xFFFFFFFF, 0xFFFFFFFF, 32);
_cpu_ppc_store_hdecr(cpu, 0xFFFFFFFF, 0xFFFFFFFF, 32);
- cpu_ppc_store_purr(cpu, 0x0000000000000000ULL);
+ cpu_ppc_store_purr(env, 0x0000000000000000ULL);
}
static void timebase_save(PPCTimebase *tb)
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index d7a95608f6..4ea5436095 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -33,8 +33,7 @@ struct ppc_tb_t {
/* Hypervisor decrementer management */
uint64_t hdecr_next; /* Tick for next hdecr interrupt */
QEMUTimer *hdecr_timer;
- uint64_t purr_load;
- uint64_t purr_start;
+ int64_t purr_offset;
void *opaque;
uint32_t flags;
};
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index eb7d2c7637..da44cc8809 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1311,6 +1311,7 @@ void cpu_ppc_store_decr(CPUPPCState *env, target_ulong
value);
target_ulong cpu_ppc_load_hdecr(CPUPPCState *env);
void cpu_ppc_store_hdecr(CPUPPCState *env, target_ulong value);
uint64_t cpu_ppc_load_purr(CPUPPCState *env);
+void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value);
uint32_t cpu_ppc601_load_rtcl(CPUPPCState *env);
uint32_t cpu_ppc601_load_rtcu(CPUPPCState *env);
#if !defined(CONFIG_USER_ONLY)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index a5f53bb421..356a14d8a6 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -655,6 +655,7 @@ DEF_HELPER_FLAGS_1(load_601_rtcu, TCG_CALL_NO_RWG, tl, env)
#if !defined(CONFIG_USER_ONLY)
#if defined(TARGET_PPC64)
DEF_HELPER_FLAGS_1(load_purr, TCG_CALL_NO_RWG, tl, env)
+DEF_HELPER_FLAGS_2(store_purr, TCG_CALL_NO_RWG, void, env, tl)
DEF_HELPER_2(store_ptcr, void, env, tl)
#endif
DEF_HELPER_2(store_sdr1, void, env, tl)
diff --git a/target/ppc/timebase_helper.c b/target/ppc/timebase_helper.c
index 8c3c2fe67c..2395295b77 100644
--- a/target/ppc/timebase_helper.c
+++ b/target/ppc/timebase_helper.c
@@ -55,6 +55,11 @@ target_ulong helper_load_purr(CPUPPCState *env)
{
return (target_ulong)cpu_ppc_load_purr(env);
}
+
+void helper_store_purr(CPUPPCState *env, target_ulong val)
+{
+ cpu_ppc_store_purr(env, val);
+}
#endif
target_ulong helper_load_601_rtcl(CPUPPCState *env)
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index 226aecf8f4..c5e4d45569 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -287,6 +287,11 @@ static void spr_read_purr(DisasContext *ctx, int gprn, int
sprn)
gen_helper_load_purr(cpu_gpr[gprn], cpu_env);
}
+static void spr_write_purr(DisasContext *ctx, int sprn, int gprn)
+{
+ gen_helper_store_purr(cpu_env, cpu_gpr[gprn]);
+}
+
/* HDECR */
static void spr_read_hdecr(DisasContext *ctx, int gprn, int sprn)
{
@@ -8013,14 +8018,16 @@ static void gen_spr_book3s_purr(CPUPPCState *env)
{
#if !defined(CONFIG_USER_ONLY)
/* PURR & SPURR: Hack - treat these as aliases for the TB for now */
- spr_register_kvm(env, SPR_PURR, "PURR",
- &spr_read_purr, SPR_NOACCESS,
- &spr_read_purr, SPR_NOACCESS,
- KVM_REG_PPC_PURR, 0x00000000);
- spr_register_kvm(env, SPR_SPURR, "SPURR",
- &spr_read_purr, SPR_NOACCESS,
- &spr_read_purr, SPR_NOACCESS,
- KVM_REG_PPC_SPURR, 0x00000000);
+ spr_register_kvm_hv(env, SPR_PURR, "PURR",
+ &spr_read_purr, SPR_NOACCESS,
+ &spr_read_purr, SPR_NOACCESS,
+ &spr_read_purr, &spr_write_purr,
+ KVM_REG_PPC_PURR, 0x00000000);
+ spr_register_kvm_hv(env, SPR_SPURR, "SPURR",
+ &spr_read_purr, SPR_NOACCESS,
+ &spr_read_purr, SPR_NOACCESS,
+ &spr_read_purr, &spr_write_purr,
+ KVM_REG_PPC_SPURR, 0x00000000);
#endif
}
--
2.23.0
- [PULL 60/88] ppc: Make PPCVirtualHypervisor an incomplete type, (continued)
- [PULL 60/88] ppc: Make PPCVirtualHypervisor an incomplete type, David Gibson, 2019/12/16
- [PULL 59/88] ppc: Ignore the CPU_INTERRUPT_EXITTB interrupt with KVM, David Gibson, 2019/12/16
- [PULL 70/88] ppc/pnv: Loop on the whole hierarchy to populate the DT with the XSCOM nodes, David Gibson, 2019/12/16
- [PULL 63/88] ppc/psi: cleanup definitions, David Gibson, 2019/12/16
- [PULL 68/88] target/ppc: Add SPR ASDR, David Gibson, 2019/12/16
- [PULL 61/88] target/ppc: Add POWER10 DD1.0 model information, David Gibson, 2019/12/16
- [PULL 75/88] ppc: Drop useless extern annotation for functions, David Gibson, 2019/12/16
- [PULL 62/88] ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machine, David Gibson, 2019/12/16
- [PULL 71/88] ppc/pnv: populate the DT with realized XSCOM devices, David Gibson, 2019/12/16
- [PULL 66/88] target/ppc: Implement the VTB for HV access, David Gibson, 2019/12/16
- [PULL 67/88] target/ppc: Work [S]PURR implementation and add HV support,
David Gibson <=
- [PULL 83/88] ppc/pnv: Pass XSCOM base address and address size to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 81/88] ppc/pnv: Introduce PnvChipClass::intc_print_info() method, David Gibson, 2019/12/16
- [PULL 74/88] ppc/pnv: Fix OCC common area region mapping, David Gibson, 2019/12/16
- [PULL 72/88] ppc/pnv: Make PnvXScomInterface an incomplete type, David Gibson, 2019/12/16
- [PULL 80/88] ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpers, David Gibson, 2019/12/16
- [PULL 76/88] ppc/pnv: Introduce PnvPsiClass::compat, David Gibson, 2019/12/16
- [PULL 77/88] ppc/pnv: Drop PnvPsiClass::chip_type, David Gibson, 2019/12/16
- [PULL 84/88] ppc/pnv: Pass content of the "compatible" property to pnv_dt_xscom(), David Gibson, 2019/12/16
- [PULL 82/88] ppc/pnv: Introduce PnvChipClass::xscom_core_base() method, David Gibson, 2019/12/16
- [PULL 78/88] ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compat, David Gibson, 2019/12/16