qemu-ppc
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH 07/13] ppc/pnv: Introduce PnvChipClass::intc_print_info() met


From: David Gibson
Subject: Re: [PATCH 07/13] ppc/pnv: Introduce PnvChipClass::intc_print_info() method
Date: Mon, 16 Dec 2019 12:28:10 +1100

On Fri, Dec 13, 2019 at 02:00:53PM +0100, Cédric Le Goater wrote:
> On 13/12/2019 13:00, Greg Kurz wrote:
> > The pnv_pic_print_info() callback checks the type of the chip in order
> > to forward to the request appropriate interrupt controller. This can
> > be achieved with QOM. Introduce a method for this in the base chip class
> > and implement it in child classes.
> > 
> > This also prepares ground for the upcoming interrupt controller of POWER10
> > chips.
> > 
> > Signed-off-by: Greg Kurz <address@hidden>
> 
> 
> Reviewed-by: Cédric Le Goater <address@hidden>
> 
> One comment below.
> 
> > ---
> >  hw/ppc/pnv.c         |   30 +++++++++++++++++++++++++-----
> >  include/hw/ppc/pnv.h |    1 +
> >  2 files changed, 26 insertions(+), 5 deletions(-)
> > 
> > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > index efc00f4cb67a..2a53e99bda2e 100644
> > --- a/hw/ppc/pnv.c
> > +++ b/hw/ppc/pnv.c
> > @@ -832,6 +832,12 @@ static void pnv_chip_power8_intc_destroy(PnvChip 
> > *chip, PowerPCCPU *cpu)
> >      pnv_cpu->intc = NULL;
> >  }
> >  
> > +static void pnv_chip_power8_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
> > +                                            Monitor *mon)
> > +{
> > +    icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), mon);
> > +}
> > +
> >  /*
> >   *    0:48  Reserved - Read as zeroes
> >   *   49:52  Node ID
> > @@ -889,6 +895,12 @@ static void pnv_chip_power9_intc_destroy(PnvChip 
> > *chip, PowerPCCPU *cpu)
> >      pnv_cpu->intc = NULL;
> >  }
> >  
> > +static void pnv_chip_power9_intc_print_info(PnvChip *chip, PowerPCCPU *cpu,
> > +                                            Monitor *mon)
> > +{
> > +    xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), mon);
> > +}
> > +
> >  static void pnv_chip_power10_intc_create(PnvChip *chip, PowerPCCPU *cpu,
> >                                          Error **errp)
> >  {
> > @@ -910,6 +922,11 @@ static void pnv_chip_power10_intc_destroy(PnvChip 
> > *chip, PowerPCCPU *cpu)
> >      pnv_cpu->intc = NULL;
> >  }
> >  
> > +static void pnv_chip_power10_intc_print_info(PnvChip *chip, PowerPCCPU 
> > *cpu,
> > +                                             Monitor *mon)
> > +{
> > +}
> > +
> >  /*
> >   * Allowed core identifiers on a POWER8 Processor Chip :
> >   *
> > @@ -1086,6 +1103,7 @@ static void pnv_chip_power8e_class_init(ObjectClass 
> > *klass, void *data)
> >      k->intc_create = pnv_chip_power8_intc_create;
> >      k->intc_reset = pnv_chip_power8_intc_reset;
> >      k->intc_destroy = pnv_chip_power8_intc_destroy;
> > +    k->intc_print_info = pnv_chip_power8_intc_print_info;
> >      k->isa_create = pnv_chip_power8_isa_create;
> >      k->dt_populate = pnv_chip_power8_dt_populate;
> >      k->pic_print_info = pnv_chip_power8_pic_print_info;
> > @@ -1107,6 +1125,7 @@ static void pnv_chip_power8_class_init(ObjectClass 
> > *klass, void *data)
> >      k->intc_create = pnv_chip_power8_intc_create;
> >      k->intc_reset = pnv_chip_power8_intc_reset;
> >      k->intc_destroy = pnv_chip_power8_intc_destroy;
> > +    k->intc_print_info = pnv_chip_power8_intc_print_info;
> >      k->isa_create = pnv_chip_power8_isa_create;
> >      k->dt_populate = pnv_chip_power8_dt_populate;
> >      k->pic_print_info = pnv_chip_power8_pic_print_info;
> > @@ -1128,6 +1147,7 @@ static void pnv_chip_power8nvl_class_init(ObjectClass 
> > *klass, void *data)
> >      k->intc_create = pnv_chip_power8_intc_create;
> >      k->intc_reset = pnv_chip_power8_intc_reset;
> >      k->intc_destroy = pnv_chip_power8_intc_destroy;
> > +    k->intc_print_info = pnv_chip_power8_intc_print_info;
> >      k->isa_create = pnv_chip_power8nvl_isa_create;
> >      k->dt_populate = pnv_chip_power8_dt_populate;
> >      k->pic_print_info = pnv_chip_power8_pic_print_info;
> > @@ -1299,6 +1319,7 @@ static void pnv_chip_power9_class_init(ObjectClass 
> > *klass, void *data)
> >      k->intc_create = pnv_chip_power9_intc_create;
> >      k->intc_reset = pnv_chip_power9_intc_reset;
> >      k->intc_destroy = pnv_chip_power9_intc_destroy;
> > +    k->intc_print_info = pnv_chip_power9_intc_print_info;
> >      k->isa_create = pnv_chip_power9_isa_create;
> >      k->dt_populate = pnv_chip_power9_dt_populate;
> >      k->pic_print_info = pnv_chip_power9_pic_print_info;
> > @@ -1379,6 +1400,7 @@ static void pnv_chip_power10_class_init(ObjectClass 
> > *klass, void *data)
> >      k->intc_create = pnv_chip_power10_intc_create;
> >      k->intc_reset = pnv_chip_power10_intc_reset;
> >      k->intc_destroy = pnv_chip_power10_intc_destroy;
> > +    k->intc_print_info = pnv_chip_power10_intc_print_info;
> >      k->isa_create = pnv_chip_power10_isa_create;
> >      k->dt_populate = pnv_chip_power10_dt_populate;
> >      k->pic_print_info = pnv_chip_power10_pic_print_info;
> > @@ -1575,11 +1597,9 @@ static void 
> > pnv_pic_print_info(InterruptStatsProvider *obj,
> >      CPU_FOREACH(cs) {
> >          PowerPCCPU *cpu = POWERPC_CPU(cs);
> >  
> > -        if (pnv_chip_is_power9(pnv->chips[0])) {
> > -            xive_tctx_pic_print_info(XIVE_TCTX(pnv_cpu_state(cpu)->intc), 
> > mon);
> > -        } else {
> > -            icp_pic_print_info(ICP(pnv_cpu_state(cpu)->intc), mon);
> > -        }
> > +        /* XXX: loop on each chip/core/thread instead of CPU_FOREACH() */
> 
> May be we should introduce a helper such as : 
> 
> int pnv_chip_cpu_foreach(PnvChip *chip,
>         int (*doit)(PnvChip *chip, PowerPCCPU *cpu, void *opaque), void 
> *opaque)
> {
>     int i, j;
>     int ret = 0;
> 
>     for (i = 0; i < chip->nr_cores; i++) {
>         PnvCore *pc = chip->cores[i];
>         CPUCore *cc = CPU_CORE(pc);
> 
>         for (j = 0; j < cc->nr_threads; j++) {
>             PowerPCCPU *cpu = pc->threads[j];
>             ret = doit(chip, cpu, opaque);
>             if (ret) { 
>                 break;
>             }
>         }
>     }
>     return ret;
> }

What I'd actually like to work towards is just having the interrupt
controllers themselves advertize TYPE_INTERRUPT_STATS_PROVIDER and not
needing anything specific at the machine level to locate them, just
let the generic code in hmp_info_pic handle it.

But this patch is fine in the meantime.

> 
> > +        PNV_CHIP_GET_CLASS(pnv->chips[0])->intc_print_info(pnv->chips[0], 
> > cpu,
> > +                                                           mon);
> >      }
> >  
> >      for (i = 0; i < pnv->num_chips; i++) {
> > diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> > index c213bdd5ecd3..7d2402784d4b 100644
> > --- a/include/hw/ppc/pnv.h
> > +++ b/include/hw/ppc/pnv.h
> > @@ -133,6 +133,7 @@ typedef struct PnvChipClass {
> >      void (*intc_create)(PnvChip *chip, PowerPCCPU *cpu, Error **errp);
> >      void (*intc_reset)(PnvChip *chip, PowerPCCPU *cpu);
> >      void (*intc_destroy)(PnvChip *chip, PowerPCCPU *cpu);
> > +    void (*intc_print_info)(PnvChip *chip, PowerPCCPU *cpu, Monitor *mon);
> >      ISABus *(*isa_create)(PnvChip *chip, Error **errp);
> >      void (*dt_populate)(PnvChip *chip, void *fdt);
> >      void (*pic_print_info)(PnvChip *chip, Monitor *mon);
> > 
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

Attachment: signature.asc
Description: PGP signature


reply via email to

[Prev in Thread] Current Thread [Next in Thread]