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[PULL 15/53] spapr: Simplify handling of pre ISA 3.0 guest workaround ha
From: |
David Gibson |
Subject: |
[PULL 15/53] spapr: Simplify handling of pre ISA 3.0 guest workaround handling |
Date: |
Fri, 4 Oct 2019 19:37:09 +1000 |
Certain old guest versions don't understand the radix MMU introduced with
POWER ISA 3.0, but incorrectly select it if presented with the option at
CAS time. We workaround this in qemu by explicitly excluding the radix
(and other ISA 3.0 linked) options if the guest doesn't explicitly note
support for ISA 3.0.
This is handled by the 'cas_legacy_guest_workaround' flag, which is pretty
vague. Rename it to 'cas_pre_isa3_guest' to be clearer about what it's for.
In addition, we unnecessarily call spapr_populate_pa_features() with
different options when initially constructing the device tree and when
adjusting it at CAS time. At the initial construct time cas_pre_isa3_guest
is already false, so we can still use the flag, rather than explicitly
overriding it to be false at the callsite.
Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Cédric Le Goater <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Reviewed-by: Alexey Kardashevskiy <address@hidden>
---
hw/ppc/spapr.c | 10 ++++------
hw/ppc/spapr_hcall.c | 3 +--
include/hw/ppc/spapr.h | 2 +-
3 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 2725b139a7..b906ac6547 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -220,8 +220,7 @@ static int spapr_fixup_cpu_numa_dt(void *fdt, int offset,
PowerPCCPU *cpu)
/* Populate the "ibm,pa-features" property */
static void spapr_populate_pa_features(SpaprMachineState *spapr,
PowerPCCPU *cpu,
- void *fdt, int offset,
- bool legacy_guest)
+ void *fdt, int offset)
{
uint8_t pa_features_206[] = { 6, 0,
0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
@@ -287,7 +286,7 @@ static void spapr_populate_pa_features(SpaprMachineState
*spapr,
if ((spapr_get_cap(spapr, SPAPR_CAP_HTM) != 0) && pa_size > 24) {
pa_features[24] |= 0x80; /* Transactional memory support */
}
- if (legacy_guest && pa_size > 40) {
+ if (spapr->cas_pre_isa3_guest && pa_size > 40) {
/* Workaround for broken kernels that attempt (guest) radix
* mode when they can't handle it, if they see the radix bit set
* in pa-features. So hide it from them. */
@@ -350,8 +349,7 @@ static int spapr_fixup_cpu_dt(void *fdt, SpaprMachineState
*spapr)
return ret;
}
- spapr_populate_pa_features(spapr, cpu, fdt, offset,
- spapr->cas_legacy_guest_workaround);
+ spapr_populate_pa_features(spapr, cpu, fdt, offset);
}
return ret;
}
@@ -553,7 +551,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *fdt,
int offset,
page_sizes_prop, page_sizes_prop_size)));
}
- spapr_populate_pa_features(spapr, cpu, fdt, offset, false);
+ spapr_populate_pa_features(spapr, cpu, fdt, offset);
_FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id",
cs->cpu_index / vcpus_per_socket)));
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 23e4bdb829..3d3a67149a 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -1765,8 +1765,7 @@ static target_ulong
h_client_architecture_support(PowerPCCPU *cpu,
exit(EXIT_FAILURE);
}
}
- spapr->cas_legacy_guest_workaround = !spapr_ovec_test(ov1_guest,
- OV1_PPC_3_00);
+ spapr->cas_pre_isa3_guest = !spapr_ovec_test(ov1_guest, OV1_PPC_3_00);
spapr_ovec_cleanup(ov1_guest);
if (!spapr->cas_reboot) {
/* If spapr_machine_reset() did not set up a HPT but one is necessary
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 03111fd55b..dfec8e8e76 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -175,7 +175,7 @@ struct SpaprMachineState {
/* ibm,client-architecture-support option negotiation */
bool cas_reboot;
- bool cas_legacy_guest_workaround;
+ bool cas_pre_isa3_guest;
SpaprOptionVector *ov5; /* QEMU-supported option vectors */
SpaprOptionVector *ov5_cas; /* negotiated (via CAS) option vectors */
uint32_t max_compat_pvr;
--
2.21.0
- [PULL 11/53] ppc: Add support for 'mffscrn','mffscrni' instructions, (continued)
- [PULL 11/53] ppc: Add support for 'mffscrn','mffscrni' instructions, David Gibson, 2019/10/04
- [PULL 08/53] hw/ppc/pnv_homer: add PowerNV homer device model, David Gibson, 2019/10/04
- [PULL 24/53] target/ppc: update {get, set}_dfp{64, 128}() helper functions to read/write DFP numbers correctly, David Gibson, 2019/10/04
- [PULL 16/53] spapr: Move handling of special NVLink numa node from reset to init, David Gibson, 2019/10/04
- [PULL 21/53] pseries: Update SLOF firmware image, David Gibson, 2019/10/04
- [PULL 20/53] spapr: Stop providing RTAS blob, David Gibson, 2019/10/04
- [PULL 13/53] ppc: Use FPSCR defines instead of constants, David Gibson, 2019/10/04
- [PULL 26/53] target/ppc: change struct PPC_DFP decimal storage from uint64[2] to ppc_vsr_t, David Gibson, 2019/10/04
- [PULL 18/53] spapr: Skip leading zeroes from memory@ DT node names, David Gibson, 2019/10/04
- [PULL 17/53] spapr: Fixes a leak in CAS, David Gibson, 2019/10/04
- [PULL 15/53] spapr: Simplify handling of pre ISA 3.0 guest workaround handling,
David Gibson <=
- [PULL 19/53] spapr: Do not put empty properties for -kernel/-initrd/-append, David Gibson, 2019/10/04
- [PULL 28/53] target/ppc: remove unnecessary if() around calls to set_dfp{64, 128}() in DFP macros, David Gibson, 2019/10/04
- [PULL 32/53] spapr/xive: skip partially initialized vCPUs in presenter, David Gibson, 2019/10/04
- [PULL 22/53] target/ppc: introduce get_dfp{64, 128}() helper functions, David Gibson, 2019/10/04
- [PULL 25/53] target/ppc: introduce dfp_finalize_decimal{64, 128}() helper functions, David Gibson, 2019/10/04
- [PULL 29/53] spapr-pci: Stop providing assigned-addresses, David Gibson, 2019/10/04
- [PULL 30/53] spapr: Render full FDT on ibm, client-architecture-support, David Gibson, 2019/10/04
- [PULL 27/53] target/ppc: use existing VsrD() macro to eliminate HI_IDX and LO_IDX from dfp_helper.c, David Gibson, 2019/10/04
- [PULL 31/53] target/ppc: use Vsr macros in BCD helpers, David Gibson, 2019/10/04
- [PULL 23/53] target/ppc: introduce set_dfp{64, 128}() helper functions, David Gibson, 2019/10/04