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Re: Re: target/ppc: bug in optimised vsl/vsr implementation?
From: |
Paul Clarke |
Subject: |
Re: Re: target/ppc: bug in optimised vsl/vsr implementation? |
Date: |
Wed, 2 Oct 2019 14:55:02 -0500 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 |
On 10/2/19 2:40 PM, Richard Henderson wrote:
> On 10/2/19 10:38 AM, Alex Bennée wrote:
>> Is the denbcdq instruction exposed in any standard float operations?
>> Once this is fixed it would be worth adding a testcase (either ppc64
>> specific or multiarch) so protect it from regression in the future.
>
> Not standard float operations -- this is binary coded decimal stuff.
> It would certainly be possible to write a ppc specific test case.
In comment #9 in the bug
(https://bugs.launchpad.net/qemu/+bug/1841990/comments/9), I note that the
issue was produced in running the test suite for the Power Vector Library
project (https://github.com/open-power-sdk/pveclib), which makes productive use
of dcbenq.
Maybe that could be adopted or adapted to suit?
PC