Re: [PATCH v2 32/33] spapr: Move SpaprIrq::nr_xirqs to SpaprMachineClass

[Greg Kurz]

On Fri, 27 Sep 2019 15:50:27 +1000
David Gibson <address@hidden> wrote:

> For the benefit of peripheral device allocation, the number of available
> irqs really wants to be the same on a given machine type version,
> regardless of what irq backends we are using.  That's the case now, but
> only because we make sure the different SpaprIrq instances have the same
> value except for the special legacy one.
> 
> Since this really only depends on machine type version, move the value to
> SpaprMachineClass instead of SpaprIrq.  This also puts the code to set it
> to the lower value on old machine types right next to setting
> legacy_irq_allocation, which needs to go hand in hand.
> 
> Signed-off-by: David Gibson <address@hidden>
> ---
>  hw/ppc/spapr.c             |  2 ++
>  hw/ppc/spapr_irq.c         | 33 ++++++++++++++++-----------------
>  include/hw/ppc/spapr.h     |  1 +
>  include/hw/ppc/spapr_irq.h |  1 -
>  4 files changed, 19 insertions(+), 18 deletions(-)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 34b693beba..7113249c89 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -4513,6 +4513,7 @@ static void spapr_machine_class_init(ObjectClass *oc, 
> void *data)
>      smc->irq = &spapr_irq_dual;
>      smc->dr_phb_enabled = true;
>      smc->linux_pci_probe = true;
> +    smc->nr_xirqs = SPAPR_NR_XIRQS;

This is the last user of SPAPR_NR_XIRQS.

$ git grep SPAPR_NR_XIRQS
hw/ppc/spapr.c:    smc->nr_xirqs = SPAPR_NR_XIRQS;
include/hw/ppc/spapr_irq.h:#define SPAPR_NR_XIRQS       0x1000

Maybe open-code it here, like you already do for SPAPR_IRQ_XICS_LEGACY_NR_XIRQS
below.

With or without that fixed.

Reviewed-by: Greg Kurz <address@hidden>

>  }
>  
>  static const TypeInfo spapr_machine_info = {
> @@ -4648,6 +4649,7 @@ static void 
> spapr_machine_3_0_class_options(MachineClass *mc)
>      compat_props_add(mc->compat_props, hw_compat_3_0, hw_compat_3_0_len);
>  
>      smc->legacy_irq_allocation = true;
> +    smc->nr_xirqs = 0x400;
>      smc->irq = &spapr_irq_xics_legacy;
>  }
>  
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 799755c811..f76f30f54b 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -106,7 +106,6 @@ int spapr_irq_init_kvm(int (*fn)(SpaprInterruptController 
> *, Error **),
>   */
>  
>  SpaprIrq spapr_irq_xics = {
> -    .nr_xirqs    = SPAPR_NR_XIRQS,
>      .xics        = true,
>      .xive        = false,
>  };
> @@ -116,7 +115,6 @@ SpaprIrq spapr_irq_xics = {
>   */
>  
>  SpaprIrq spapr_irq_xive = {
> -    .nr_xirqs    = SPAPR_NR_XIRQS,
>      .xics        = false,
>      .xive        = true,
>  };
> @@ -134,7 +132,6 @@ SpaprIrq spapr_irq_xive = {
>   * Define values in sync with the XIVE and XICS backend
>   */
>  SpaprIrq spapr_irq_dual = {
> -    .nr_xirqs    = SPAPR_NR_XIRQS,
>      .xics        = true,
>      .xive        = true,
>  };
> @@ -249,16 +246,19 @@ void spapr_irq_dt(SpaprMachineState *spapr, uint32_t 
> nr_servers,
>  
>  uint32_t spapr_irq_nr_msis(SpaprMachineState *spapr)
>  {
> -    if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
> -        return spapr->irq->nr_xirqs;
> +    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
> +
> +    if (smc->legacy_irq_allocation) {
> +        return smc->nr_xirqs;
>      } else {
> -        return SPAPR_XIRQ_BASE + spapr->irq->nr_xirqs - SPAPR_IRQ_MSI;
> +        return SPAPR_XIRQ_BASE + smc->nr_xirqs - SPAPR_IRQ_MSI;
>      }
>  }
>  
>  void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
>  {
>      MachineState *machine = MACHINE(spapr);
> +    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
>      Error *local_err = NULL;
>  
>      if (machine_kernel_irqchip_split(machine)) {
> @@ -295,8 +295,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error 
> **errp)
>              goto out;
>          }
>  
> -        object_property_set_int(obj, spapr->irq->nr_xirqs, "nr-irqs",
> -                                &local_err);
> +        object_property_set_int(obj, smc->nr_xirqs, "nr-irqs", &local_err);
>          if (local_err) {
>              goto out;
>          }
> @@ -315,8 +314,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error 
> **errp)
>          int i;
>  
>          dev = qdev_create(NULL, TYPE_SPAPR_XIVE);
> -        qdev_prop_set_uint32(dev, "nr-irqs",
> -                             spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE);
> +        qdev_prop_set_uint32(dev, "nr-irqs", smc->nr_xirqs + 
> SPAPR_XIRQ_BASE);
>          /*
>           * 8 XIVE END structures per CPU. One for each available
>           * priority
> @@ -343,7 +341,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error 
> **errp)
>      }
>  
>      spapr->qirqs = qemu_allocate_irqs(spapr_set_irq, spapr,
> -                                      spapr->irq->nr_xirqs + 
> SPAPR_XIRQ_BASE);
> +                                      smc->nr_xirqs + SPAPR_XIRQ_BASE);
>  
>  out:
>      error_propagate(errp, local_err);
> @@ -351,10 +349,11 @@ out:
>  
>  int spapr_irq_claim(SpaprMachineState *spapr, int irq, bool lsi, Error 
> **errp)
>  {
> +    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
>      int rc;
>  
>      assert(irq >= SPAPR_XIRQ_BASE);
> -    assert(irq < (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
> +    assert(irq < (smc->nr_xirqs + SPAPR_XIRQ_BASE));
>  
>      if (spapr->xive) {
>          SpaprInterruptControllerClass *sicc = 
> SPAPR_INTC_GET_CLASS(spapr->xive);
> @@ -379,10 +378,11 @@ int spapr_irq_claim(SpaprMachineState *spapr, int irq, 
> bool lsi, Error **errp)
>  
>  void spapr_irq_free(SpaprMachineState *spapr, int irq, int num)
>  {
> +    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
>      int i;
>  
>      assert(irq >= SPAPR_XIRQ_BASE);
> -    assert((irq + num) <= (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
> +    assert((irq + num) <= (smc->nr_xirqs + SPAPR_XIRQ_BASE));
>  
>      for (i = irq; i < (irq + num); i++) {
>          if (spapr->xive) {
> @@ -402,6 +402,8 @@ void spapr_irq_free(SpaprMachineState *spapr, int irq, 
> int num)
>  
>  qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq)
>  {
> +    SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
> +
>      /*
>       * This interface is basically for VIO and PHB devices to find the
>       * right qemu_irq to manipulate, so we only allow access to the
> @@ -410,7 +412,7 @@ qemu_irq spapr_qirq(SpaprMachineState *spapr, int irq)
>       * interfaces, we can change this if we need to in future.
>       */
>      assert(irq >= SPAPR_XIRQ_BASE);
> -    assert(irq < (spapr->irq->nr_xirqs + SPAPR_XIRQ_BASE));
> +    assert(irq < (smc->nr_xirqs + SPAPR_XIRQ_BASE));
>  
>      if (spapr->ics) {
>          assert(ics_valid_irq(spapr->ics, irq));
> @@ -563,10 +565,7 @@ int spapr_irq_find(SpaprMachineState *spapr, int num, 
> bool align, Error **errp)
>      return first + ics->offset;
>  }
>  
> -#define SPAPR_IRQ_XICS_LEGACY_NR_XIRQS     0x400
> -
>  SpaprIrq spapr_irq_xics_legacy = {
> -    .nr_xirqs    = SPAPR_IRQ_XICS_LEGACY_NR_XIRQS,
>      .xics        = true,
>      .xive        = false,
>  };
> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
> index 763da757f0..623e8e3f93 100644
> --- a/include/hw/ppc/spapr.h
> +++ b/include/hw/ppc/spapr.h
> @@ -119,6 +119,7 @@ struct SpaprMachineClass {
>      bool use_ohci_by_default;  /* use USB-OHCI instead of XHCI */
>      bool pre_2_10_has_unused_icps;
>      bool legacy_irq_allocation;
> +    uint32_t nr_xirqs;
>      bool broken_host_serial_model; /* present real host info to the guest */
>      bool pre_4_1_migration; /* don't migrate hpt-max-page-size */
>      bool linux_pci_probe;
> diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h
> index 308bfcefd1..73d8beda39 100644
> --- a/include/hw/ppc/spapr_irq.h
> +++ b/include/hw/ppc/spapr_irq.h
> @@ -77,7 +77,6 @@ int spapr_irq_msi_alloc(SpaprMachineState *spapr, uint32_t 
> num, bool align,
>  void spapr_irq_msi_free(SpaprMachineState *spapr, int irq, uint32_t num);
>  
>  typedef struct SpaprIrq {
> -    uint32_t    nr_xirqs;
>      bool        xics;
>      bool        xive;
>  } SpaprIrq;