Re: [Qemu-ppc] [PULL 41/49] target/ppc: improve VSX_FMADD with new GEN_VSX_HELPER_VSX_MADD macro

[Paul Clarke]

On 8/28/19 10:50 AM, Laurent Vivier wrote:
> On 02/07/2019 08:08, David Gibson wrote:
>> From: Mark Cave-Ayland <address@hidden>
>>
>> Introduce a new GEN_VSX_HELPER_VSX_MADD macro for the generator function 
>> which
>> enables the source and destination registers to be decoded at translation 
>> time.
>>
>> This enables the determination of a or m form to be made at translation time 
>> so
>> that a single helper function can now be used for both variants.
>>
>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>> Reviewed-by: Richard Henderson <address@hidden>
>> Message-Id: <address@hidden>
>> Signed-off-by: David Gibson <address@hidden>
>> ---
>>  target/ppc/fpu_helper.c             | 68 ++++++++----------------
>>  target/ppc/helper.h                 | 48 ++++++-----------
>>  target/ppc/translate/vsx-impl.inc.c | 81 +++++++++++++++++------------
>>  target/ppc/translate/vsx-ops.inc.c  | 70 +++++++++++++------------
>>  4 files changed, 122 insertions(+), 145 deletions(-)
>>
> 
> This patch breaks something with python/libm and RHEL8.
> 
> # dnf update 
> qemu: uncaught target signal 11 (Segmentation fault) - core dumped
> Segmentation fault (core dumped)
> 
> # gdb
> ...
> Program terminated with signal SIGSEGV, Segmentation fault.
> #0  0x0000004000d09acc in __exp1 () from /lib64/libm.so.6
> Missing separate debuginfos, use: yum debuginfo-install 
> platform-python-3.6.8-14.el8.ppc64le
> (gdb) bt
> #0  0x0000004000d09acc in __exp1 () from /lib64/libm.so.6
> #1  0x0000004000d0dcb4 in __pow_finite () from /lib64/libm.so.6
> #2  0x0000004000cd3c8c in powf64 () from /lib64/libm.so.6
> #3  0x00000040009d5c5c in float_pow () from /lib64/libpython3.6m.so.1.0
> 
> If I revert it, it works fine.
> 
> My first guess is the opcode decoding is not correct to replace the afrm 
> field.
> 
> I'm not sure to understand correctly the code, but this seems to fix the 
> problem:
> 
> --- a/target/ppc/translate/vsx-impl.inc.c
> +++ b/target/ppc/translate/vsx-impl.inc.c
> @@ -1308,7 +1308,7 @@ static void gen_##name(DisasContext *ctx)               
>                       \
>      }                                                                        
>  \
>      xt = gen_vsr_ptr(xT(ctx->opcode));                                       
>  \
>      xa = gen_vsr_ptr(xA(ctx->opcode));                                       
>  \
> -    if (ctx->opcode & PPC_BIT(25)) {                                         
>  \
> +    if (ctx->opcode & PPC_BIT32(25)) {                                       
>  \
>          /*                                                                   
>  \
>           * AxT + B                                                           
>  \
>           */                                                                  
>  \


This same patch was just posted a week ago (by me).  
https://lists.nongnu.org/archive/html/qemu-devel/2019-08/msg04344.html

David Gibson "Applied to ppc-for-4.2" the same day.  Can you try that?

PC