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[Qemu-ppc] [PULL 42/42] ppc: Fix emulated single to double denormalized
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 42/42] ppc: Fix emulated single to double denormalized conversions |
Date: |
Wed, 21 Aug 2019 17:25:42 +1000 |
From: "Paul A. Clarke" <address@hidden>
helper_todouble() was not properly converting any denormalized 32 bit
float to 64 bit double.
Fix-suggested-by: Richard Henderson <address@hidden>
Signed-off-by: Paul A. Clarke <address@hidden>
v2:
- Splitting patch "ppc: Three floating point fixes"; this is just one part.
- Original suggested "fix" was likely flawed. v2 is rewritten by
Richard Henderson (Thanks, Richard!); I reformatted the comments in a
couple of places, compiled, and tested.
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/fpu_helper.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 52bcda27a6..07bc9051b0 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -73,11 +73,20 @@ uint64_t helper_todouble(uint32_t arg)
/* Zero or Denormalized operand. */
ret = (uint64_t)extract32(arg, 31, 1) << 63;
if (unlikely(abs_arg != 0)) {
- /* Denormalized operand. */
- int shift = clz32(abs_arg) - 9;
- int exp = -126 - shift + 1023;
+ /*
+ * Denormalized operand.
+ * Shift fraction so that the msb is in the implicit bit position.
+ * Thus, shift is in the range [1:23].
+ */
+ int shift = clz32(abs_arg) - 8;
+ /*
+ * The first 3 terms compute the float64 exponent. We then bias
+ * this result by -1 so that we can swallow the implicit bit below.
+ */
+ int exp = -126 - shift + 1023 - 1;
+
ret |= (uint64_t)exp << 52;
- ret |= abs_arg << (shift + 29);
+ ret += (uint64_t)abs_arg << (52 - 23 + shift);
}
}
return ret;
--
2.21.0
- [Qemu-ppc] [PULL 28/42] ppc/xive: Improve 'info pic' support, (continued)
- [Qemu-ppc] [PULL 28/42] ppc/xive: Improve 'info pic' support, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 38/42] target/ppc: Add Directed Privileged Door-bell Exception State (DPDES) SPR, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 21/42] pseries: Update SLOF firmware image, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 27/42] ppc/xive: Provide silent escalation support, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 30/42] i386: use machine class ->wakeup method, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 22/42] ppc/xive: use an abstract type for XiveNotifier, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 24/42] ppc/xive: Provide backlog support, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 32/42] ppc: remove idle_timer logic, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 40/42] ppc: conform to processor User's Manual for xscvdpspn, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 41/42] ppc: Fix emulated INFINITY and NAN conversions, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 42/42] ppc: Fix emulated single to double denormalized conversions,
David Gibson <=
- [Qemu-ppc] [PULL 31/42] spapr: Implement ibm,suspend-me, David Gibson, 2019/08/21
- [Qemu-ppc] [PULL 39/42] ppc: Add support for 'mffsl' instruction, David Gibson, 2019/08/21
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/42] ppc-for-4.2 queue 20190821, no-reply, 2019/08/21
- Re: [Qemu-ppc] [PULL 00/42] ppc-for-4.2 queue 20190821, Peter Maydell, 2019/08/21