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[Qemu-ppc] [PULL 29/43] target/ppc: convert vspltis[bhw] to use vector o
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 29/43] target/ppc: convert vspltis[bhw] to use vector operations |
Date: |
Tue, 19 Feb 2019 01:30:35 +1100 |
From: Richard Henderson <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/helper.h | 3 ---
target/ppc/int_helper.c | 15 ------------
target/ppc/translate/vmx-impl.inc.c | 36 +++++++----------------------
3 files changed, 8 insertions(+), 46 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 553ff500c8..2aa60e5d36 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -246,9 +246,6 @@ DEF_HELPER_3(vrld, void, avr, avr, avr)
DEF_HELPER_3(vsl, void, avr, avr, avr)
DEF_HELPER_3(vsr, void, avr, avr, avr)
DEF_HELPER_4(vsldoi, void, avr, avr, avr, i32)
-DEF_HELPER_2(vspltisb, void, avr, i32)
-DEF_HELPER_2(vspltish, void, avr, i32)
-DEF_HELPER_2(vspltisw, void, avr, i32)
DEF_HELPER_3(vspltb, void, avr, avr, i32)
DEF_HELPER_3(vsplth, void, avr, avr, i32)
DEF_HELPER_3(vspltw, void, avr, avr, i32)
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index ffccda8b9b..2f793a3543 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -1998,21 +1998,6 @@ VNEG(vnegw, s32)
VNEG(vnegd, s64)
#undef VNEG
-#define VSPLTI(suffix, element, splat_type) \
- void helper_vspltis##suffix(ppc_avr_t *r, uint32_t splat) \
- { \
- splat_type x = (int8_t)(splat << 3) >> 3; \
- int i; \
- \
- for (i = 0; i < ARRAY_SIZE(r->element); i++) { \
- r->element[i] = x; \
- } \
- }
-VSPLTI(b, s8, int8_t)
-VSPLTI(h, s16, int16_t)
-VSPLTI(w, s32, int32_t)
-#undef VSPLTI
-
#define VSR(suffix, element, mask) \
void helper_vsr##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \
{ \
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index b104c6e38e..c26c342e16 100644
--- a/target/ppc/translate/vmx-impl.inc.c
+++ b/target/ppc/translate/vmx-impl.inc.c
@@ -704,25 +704,21 @@ GEN_VXRFORM_DUAL(vcmpbfp, PPC_ALTIVEC, PPC_NONE, \
GEN_VXRFORM_DUAL(vcmpgtfp, PPC_ALTIVEC, PPC_NONE, \
vcmpgtud, PPC_NONE, PPC2_ALTIVEC_207)
-#define GEN_VXFORM_SIMM(name, opc2, opc3) \
+#define GEN_VXFORM_DUPI(name, tcg_op, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx) \
{ \
- TCGv_ptr rd; \
- TCGv_i32 simm; \
+ int simm; \
if (unlikely(!ctx->altivec_enabled)) { \
gen_exception(ctx, POWERPC_EXCP_VPU); \
return; \
} \
- simm = tcg_const_i32(SIMM5(ctx->opcode)); \
- rd = gen_avr_ptr(rD(ctx->opcode)); \
- gen_helper_##name (rd, simm); \
- tcg_temp_free_i32(simm); \
- tcg_temp_free_ptr(rd); \
+ simm = SIMM5(ctx->opcode); \
+ tcg_op(avr64_offset(rD(ctx->opcode), true), 16, 16, simm); \
}
-GEN_VXFORM_SIMM(vspltisb, 6, 12);
-GEN_VXFORM_SIMM(vspltish, 6, 13);
-GEN_VXFORM_SIMM(vspltisw, 6, 14);
+GEN_VXFORM_DUPI(vspltisb, tcg_gen_gvec_dup8i, 6, 12);
+GEN_VXFORM_DUPI(vspltish, tcg_gen_gvec_dup16i, 6, 13);
+GEN_VXFORM_DUPI(vspltisw, tcg_gen_gvec_dup32i, 6, 14);
#define GEN_VXFORM_NOA(name, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx)
\
@@ -802,22 +798,6 @@ GEN_VXFORM_NOA(vprtybw, 1, 24);
GEN_VXFORM_NOA(vprtybd, 1, 24);
GEN_VXFORM_NOA(vprtybq, 1, 24);
-#define GEN_VXFORM_SIMM(name, opc2, opc3) \
-static void glue(gen_, name)(DisasContext *ctx)
\
- { \
- TCGv_ptr rd; \
- TCGv_i32 simm; \
- if (unlikely(!ctx->altivec_enabled)) { \
- gen_exception(ctx, POWERPC_EXCP_VPU); \
- return; \
- } \
- simm = tcg_const_i32(SIMM5(ctx->opcode)); \
- rd = gen_avr_ptr(rD(ctx->opcode)); \
- gen_helper_##name (rd, simm); \
- tcg_temp_free_i32(simm); \
- tcg_temp_free_ptr(rd); \
- }
-
#define GEN_VXFORM_UIMM(name, opc2, opc3) \
static void glue(gen_, name)(DisasContext *ctx)
\
{ \
@@ -1240,7 +1220,7 @@ GEN_VXFORM_DUAL(vsldoi, PPC_ALTIVEC, PPC_NONE,
#undef GEN_VXRFORM_DUAL
#undef GEN_VXRFORM1
#undef GEN_VXRFORM
-#undef GEN_VXFORM_SIMM
+#undef GEN_VXFORM_DUPI
#undef GEN_VXFORM_NOA
#undef GEN_VXFORM_UIMM
#undef GEN_VAFORM_PAIRED
--
2.20.1
- [Qemu-ppc] [PULL 15/43] spapr/irq: add an 'nr_irq' parameter to initialize the backend., (continued)
- [Qemu-ppc] [PULL 15/43] spapr/irq: add an 'nr_irq' parameter to initialize the backend., David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 14/43] spapr: fix out of bounds write in spapr_populate_drmem_v2, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 23/43] xics: Handle KVM ICS reset from the "simple" ICS code, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 18/43] xics: Handle KVM ICP reset from the common code, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 22/43] xics: Explicitely call KVM ICS methods from the common code, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 27/43] target/ppc: convert VMX logical instructions to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 21/43] xics: Drop the KVM ICP class, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 20/43] spapr/irq: Use the base ICP class for KVM, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 31/43] target/ppc: convert VSX logical operations to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 25/43] spapr/irq: Use the "simple" ICS class for KVM, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 29/43] target/ppc: convert vspltis[bhw] to use vector operations,
David Gibson <=
- [Qemu-ppc] [PULL 36/43] target/ppc: Use helper_mtvscr for reset and gdb, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 28/43] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 26/43] xics: Drop the KVM ICS class, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 24/43] xics: Handle KVM interrupt presentation from "simple" ICS code, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 33/43] target/ppc: convert xxspltw to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 39/43] target/ppc: Use mtvscr/mfvscr for vmstate, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 30/43] target/ppc: convert vsplt[bhw] to use vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 32/43] target/ppc: convert xxspltib to vector operations, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 37/43] target/ppc: Remove vscr_nj and vscr_sat, David Gibson, 2019/02/18
- [Qemu-ppc] [PULL 41/43] target/ppc: Split out VSCR_SAT to a vector field, David Gibson, 2019/02/18