Re: [Qemu-ppc] [PATCH 3/4] spapr: move the interrupt presenters under machine_data

[Greg Kurz]

On Thu, 17 Jan 2019 08:53:26 +0100
Cédric Le Goater <address@hidden> wrote:

> Next step is to remove them from under the PowerPCCPU
> 
> Signed-off-by: Cédric Le Goater <address@hidden>
> ---

Reviewed-by: Greg Kurz <address@hidden>

>  include/hw/ppc/spapr_cpu_core.h |  2 ++
>  hw/intc/spapr_xive.c            |  3 ++-
>  hw/intc/xics_spapr.c            | 11 ++++++-----
>  hw/ppc/spapr.c                  |  2 +-
>  hw/ppc/spapr_cpu_core.c         |  8 ++++----
>  hw/ppc/spapr_irq.c              | 17 ++++++++++-------
>  6 files changed, 25 insertions(+), 18 deletions(-)
> 
> diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_core.h
> index 9e2821e4b31f..d64f86bc284e 100644
> --- a/include/hw/ppc/spapr_cpu_core.h
> +++ b/include/hw/ppc/spapr_cpu_core.h
> @@ -46,6 +46,8 @@ typedef struct sPAPRCPUState {
>      uint64_t vpa_addr;
>      uint64_t slb_shadow_addr, slb_shadow_size;
>      uint64_t dtl_addr, dtl_size;
> +    struct ICPState *icp;
> +    struct XiveTCTX *tctx;
>  } sPAPRCPUState;
>  
>  static inline sPAPRCPUState *spapr_cpu_state(PowerPCCPU *cpu)
> diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
> index 136d872f16bc..a0f5ff929447 100644
> --- a/hw/intc/spapr_xive.c
> +++ b/hw/intc/spapr_xive.c
> @@ -16,6 +16,7 @@
>  #include "monitor/monitor.h"
>  #include "hw/ppc/fdt.h"
>  #include "hw/ppc/spapr.h"
> +#include "hw/ppc/spapr_cpu_core.h"
>  #include "hw/ppc/spapr_xive.h"
>  #include "hw/ppc/xive.h"
>  #include "hw/ppc/xive_regs.h"
> @@ -394,7 +395,7 @@ static XiveTCTX *spapr_xive_get_tctx(XiveRouter *xrtr, 
> CPUState *cs)
>  {
>      PowerPCCPU *cpu = POWERPC_CPU(cs);
>  
> -    return cpu->tctx;
> +    return spapr_cpu_state(cpu)->tctx;
>  }
>  
>  static const VMStateDescription vmstate_spapr_xive_end = {
> diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
> index de6cc15b6474..e2d8b3818336 100644
> --- a/hw/intc/xics_spapr.c
> +++ b/hw/intc/xics_spapr.c
> @@ -31,6 +31,7 @@
>  #include "trace.h"
>  #include "qemu/timer.h"
>  #include "hw/ppc/spapr.h"
> +#include "hw/ppc/spapr_cpu_core.h"
>  #include "hw/ppc/xics.h"
>  #include "hw/ppc/xics_spapr.h"
>  #include "hw/ppc/fdt.h"
> @@ -45,7 +46,7 @@ static target_ulong h_cppr(PowerPCCPU *cpu, 
> sPAPRMachineState *spapr,
>  {
>      target_ulong cppr = args[0];
>  
> -    icp_set_cppr(cpu->icp, cppr);
> +    icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr);
>      return H_SUCCESS;
>  }
>  
> @@ -66,7 +67,7 @@ static target_ulong h_ipi(PowerPCCPU *cpu, 
> sPAPRMachineState *spapr,
>  static target_ulong h_xirr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>                             target_ulong opcode, target_ulong *args)
>  {
> -    uint32_t xirr = icp_accept(cpu->icp);
> +    uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp);
>  
>      args[0] = xirr;
>      return H_SUCCESS;
> @@ -75,7 +76,7 @@ static target_ulong h_xirr(PowerPCCPU *cpu, 
> sPAPRMachineState *spapr,
>  static target_ulong h_xirr_x(PowerPCCPU *cpu, sPAPRMachineState *spapr,
>                               target_ulong opcode, target_ulong *args)
>  {
> -    uint32_t xirr = icp_accept(cpu->icp);
> +    uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp);
>  
>      args[0] = xirr;
>      args[1] = cpu_get_host_ticks();
> @@ -87,7 +88,7 @@ static target_ulong h_eoi(PowerPCCPU *cpu, 
> sPAPRMachineState *spapr,
>  {
>      target_ulong xirr = args[0];
>  
> -    icp_eoi(cpu->icp, xirr);
> +    icp_eoi(spapr_cpu_state(cpu)->icp, xirr);
>      return H_SUCCESS;
>  }
>  
> @@ -95,7 +96,7 @@ static target_ulong h_ipoll(PowerPCCPU *cpu, 
> sPAPRMachineState *spapr,
>                              target_ulong opcode, target_ulong *args)
>  {
>      uint32_t mfrr;
> -    uint32_t xirr = icp_ipoll(cpu->icp, &mfrr);
> +    uint32_t xirr = icp_ipoll(spapr_cpu_state(cpu)->icp, &mfrr);
>  
>      args[0] = xirr;
>      args[1] = mfrr;
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 83081defde4e..181f994c87a7 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -3896,7 +3896,7 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int 
> vcpu_id)
>  {
>      PowerPCCPU *cpu = spapr_find_cpu(vcpu_id);
>  
> -    return cpu ? cpu->icp : NULL;
> +    return cpu ? spapr_cpu_state(cpu)->icp : NULL;
>  }
>  
>  static void spapr_pic_print_info(InterruptStatsProvider *obj,
> diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
> index 0405306d1e59..ef6cbb9c2943 100644
> --- a/hw/ppc/spapr_cpu_core.c
> +++ b/hw/ppc/spapr_cpu_core.c
> @@ -194,11 +194,11 @@ static void spapr_unrealize_vcpu(PowerPCCPU *cpu, 
> sPAPRCPUCore *sc)
>          vmstate_unregister(NULL, &vmstate_spapr_cpu_state, 
> cpu->machine_data);
>      }
>      qemu_unregister_reset(spapr_cpu_reset, cpu);
> -    if (cpu->icp) {
> -        object_unparent(OBJECT(cpu->icp));
> +    if (spapr_cpu_state(cpu)->icp) {
> +        object_unparent(OBJECT(spapr_cpu_state(cpu)->icp));
>      }
> -    if (cpu->tctx) {
> -        object_unparent(OBJECT(cpu->tctx));
> +    if (spapr_cpu_state(cpu)->tctx) {
> +        object_unparent(OBJECT(spapr_cpu_state(cpu)->tctx));
>      }
>      cpu_remove_sync(CPU(cpu));
>      object_unparent(OBJECT(cpu));
> diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c
> index 1da7a32348fc..2d7a7c163876 100644
> --- a/hw/ppc/spapr_irq.c
> +++ b/hw/ppc/spapr_irq.c
> @@ -12,6 +12,7 @@
>  #include "qemu/error-report.h"
>  #include "qapi/error.h"
>  #include "hw/ppc/spapr.h"
> +#include "hw/ppc/spapr_cpu_core.h"
>  #include "hw/ppc/spapr_xive.h"
>  #include "hw/ppc/xics.h"
>  #include "hw/ppc/xics_spapr.h"
> @@ -185,7 +186,7 @@ static void spapr_irq_print_info_xics(sPAPRMachineState 
> *spapr, Monitor *mon)
>      CPU_FOREACH(cs) {
>          PowerPCCPU *cpu = POWERPC_CPU(cs);
>  
> -        icp_pic_print_info(cpu->icp, mon);
> +        icp_pic_print_info(spapr_cpu_state(cpu)->icp, mon);
>      }
>  
>      ics_pic_print_info(spapr->ics, mon);
> @@ -196,6 +197,7 @@ static void 
> spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr,
>  {
>      Error *local_err = NULL;
>      Object *obj;
> +    sPAPRCPUState *spapr_cpu = spapr_cpu_state(cpu);
>  
>      obj = icp_create(OBJECT(cpu), spapr->icp_type, XICS_FABRIC(spapr),
>                       &local_err);
> @@ -204,7 +206,7 @@ static void 
> spapr_irq_cpu_intc_create_xics(sPAPRMachineState *spapr,
>          return;
>      }
>  
> -    cpu->icp = ICP(obj);
> +    spapr_cpu->icp = ICP(obj);
>  }
>  
>  static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)
> @@ -213,7 +215,7 @@ static int spapr_irq_post_load_xics(sPAPRMachineState 
> *spapr, int version_id)
>          CPUState *cs;
>          CPU_FOREACH(cs) {
>              PowerPCCPU *cpu = POWERPC_CPU(cs);
> -            icp_resend(cpu->icp);
> +            icp_resend(spapr_cpu_state(cpu)->icp);
>          }
>      }
>      return 0;
> @@ -334,7 +336,7 @@ static void spapr_irq_print_info_xive(sPAPRMachineState 
> *spapr,
>      CPU_FOREACH(cs) {
>          PowerPCCPU *cpu = POWERPC_CPU(cs);
>  
> -        xive_tctx_pic_print_info(cpu->tctx, mon);
> +        xive_tctx_pic_print_info(spapr_cpu_state(cpu)->tctx, mon);
>      }
>  
>      spapr_xive_pic_print_info(spapr->xive, mon);
> @@ -345,6 +347,7 @@ static void 
> spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr,
>  {
>      Error *local_err = NULL;
>      Object *obj;
> +    sPAPRCPUState *spapr_cpu = spapr_cpu_state(cpu);
>  
>      obj = xive_tctx_create(OBJECT(cpu), XIVE_ROUTER(spapr->xive), 
> &local_err);
>      if (local_err) {
> @@ -352,13 +355,13 @@ static void 
> spapr_irq_cpu_intc_create_xive(sPAPRMachineState *spapr,
>          return;
>      }
>  
> -    cpu->tctx = XIVE_TCTX(obj);
> +    spapr_cpu->tctx = XIVE_TCTX(obj);
>  
>      /*
>       * (TCG) Early setting the OS CAM line for hotplugged CPUs as they
>       * don't beneficiate from the reset of the XIVE IRQ backend
>       */
> -    spapr_xive_set_tctx_os_cam(cpu->tctx);
> +    spapr_xive_set_tctx_os_cam(spapr_cpu->tctx);
>  }
>  
>  static int spapr_irq_post_load_xive(sPAPRMachineState *spapr, int version_id)
> @@ -374,7 +377,7 @@ static void spapr_irq_reset_xive(sPAPRMachineState 
> *spapr, Error **errp)
>          PowerPCCPU *cpu = POWERPC_CPU(cs);
>  
>          /* (TCG) Set the OS CAM line of the thread interrupt context. */
> -        spapr_xive_set_tctx_os_cam(cpu->tctx);
> +        spapr_xive_set_tctx_os_cam(spapr_cpu_state(cpu)->tctx);
>      }
>  
>      /* Activate the XIVE MMIOs */