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Re: [Qemu-ppc] [PATCH v3 0/1] ppc/pnv: Add model for Power8 PHB3 PCIe Ho
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-ppc] [PATCH v3 0/1] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge |
Date: |
Wed, 12 Sep 2018 10:04:05 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 07/30/2018 07:17 PM, Cédric Le Goater wrote:
> This is a model of the PCIe Host Bridge (PHB3) controller found on a
> Power8 processor. The Power8 processor comes in different flavors:
> Venice, Murano, Naple, each having a different number of PHBs. Multi
> chip is supported, each chip adding its set of PHB3 controllers.
>
> There is no default device layout and PCI devices should be added to
> the machine using command line options such as :
>
> -device e1000e,netdev=net0,mac=C0:FF:EE:00:00:02,bus=pcie.0,addr=0x0
> -netdev
> bridge,id=net0,helper=/usr/libexec/qemu-bridge-helper,br=virbr0,id=hostnet0
>
> -device megasas,id=scsi0,bus=pcie.1,addr=0x0
> -drive file=$disk,if=none,id=drive-scsi0-0-0-0,format=qcow2,cache=none
> -device
> scsi-hd,bus=scsi0.0,channel=0,scsi-id=0,lun=0,drive=drive-scsi0-0-0-0,id=scsi0-0-0-0,bootindex=2
>
> Git tree available here for testing, based on David's branch:
>
> https://github.com/legoater/qemu/tree/phb3-3.0
>
Would it be possible to have some feedback on this model ? It has proved
to be useful these last years and it has been extensively modified to
to fit mainline best practices.
Thanks,
C.
- Re: [Qemu-ppc] [PATCH v3 0/1] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge,
Cédric Le Goater <=