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[Qemu-ppc] [PATCH 5/7] target/ppc: Tidy helper_fsqrt
From: |
Richard Henderson |
Subject: |
[Qemu-ppc] [PATCH 5/7] target/ppc: Tidy helper_fsqrt |
Date: |
Tue, 3 Jul 2018 08:17:30 -0700 |
Tidy the invalid exception checking so that we rely on softfloat for
initial argument validation, and select the kind of invalid operand
exception only when we know we must. Pass and return float64 values
directly rather than bounce through the CPU_DoubleU union.
Signed-off-by: Richard Henderson <address@hidden>
---
target/ppc/helper.h | 2 +-
target/ppc/fpu_helper.c | 29 ++++++++++++++---------------
2 files changed, 15 insertions(+), 16 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 3262e2feaf..cc3d031407 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -93,7 +93,7 @@ DEF_HELPER_4(fmadd, i64, env, i64, i64, i64)
DEF_HELPER_4(fmsub, i64, env, i64, i64, i64)
DEF_HELPER_4(fnmadd, i64, env, i64, i64, i64)
DEF_HELPER_4(fnmsub, i64, env, i64, i64, i64)
-DEF_HELPER_2(fsqrt, i64, env, i64)
+DEF_HELPER_2(fsqrt, f64, env, f64)
DEF_HELPER_2(fre, i64, env, i64)
DEF_HELPER_2(fres, i64, env, i64)
DEF_HELPER_2(frsqrte, i64, env, i64)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 2d56c93498..c8a2dd6408 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -850,25 +850,24 @@ uint64_t helper_frsp(CPUPPCState *env, uint64_t arg)
}
/* fsqrt - fsqrt. */
-uint64_t helper_fsqrt(CPUPPCState *env, uint64_t arg)
+float64 helper_fsqrt(CPUPPCState *env, float64 arg)
{
- CPU_DoubleU farg;
+ float64 ret = float64_sqrt(arg, &env->fp_status);
+ int status = get_float_exception_flags(&env->fp_status);
- farg.ll = arg;
-
- if (unlikely(float64_is_any_nan(farg.d))) {
- if (unlikely(float64_is_signaling_nan(farg.d, &env->fp_status))) {
- /* sNaN reciprocal square root */
- float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
- farg.ll = float64_snan_to_qnan(farg.ll);
+ if (unlikely(status & float_flag_invalid)) {
+ if (unlikely(float64_is_any_nan(arg))) {
+ if (unlikely(float64_is_signaling_nan(arg, &env->fp_status))) {
+ /* sNaN square root */
+ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
+ }
+ } else {
+ /* Square root of a negative nonzero number */
+ float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1);
}
- } else if (unlikely(float64_is_neg(farg.d) && !float64_is_zero(farg.d))) {
- /* Square root of a negative nonzero number */
- farg.ll = float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSQRT, 1);
- } else {
- farg.d = float64_sqrt(farg.d, &env->fp_status);
}
- return farg.ll;
+
+ return ret;
}
/* fre - fre. */
--
2.17.1
- [Qemu-ppc] [PATCH for-3.1 0/7] target/ppc fp cleanups, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 1/7] target/ppc: Enable fp exceptions for user-only, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 2/7] target/ppc: Honor fpscr_ze semantics and tidy fdiv, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 4/7] target/ppc: Tidy helper_fadd, helper_fsub, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 3/7] target/ppc: Tidy helper_fmul, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 5/7] target/ppc: Tidy helper_fsqrt,
Richard Henderson <=
- [Qemu-ppc] [PATCH 6/7] target/ppc: Honor fpscr_ze semantics and tidy fre, fresqrt, Richard Henderson, 2018/07/03
- [Qemu-ppc] [PATCH 7/7] target/ppc: Use non-arithmetic conversions for fp load/store, Richard Henderson, 2018/07/03
Re: [Qemu-ppc] [PATCH for-3.1 0/7] target/ppc fp cleanups, David Gibson, 2018/07/04