Re: [Qemu-ppc] [PATCH] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge

[David Gibson]

On Wed, Jun 27, 2018 at 12:22:31PM +0200, Andrea Bolognani wrote:
> On Tue, 2018-06-26 at 19:02 +0200, Cédric Le Goater wrote:
> > On 06/26/2018 05:57 PM, Andrea Bolognani wrote:
> > > On Tue, 2018-06-26 at 15:59 +0200, Cédric Le Goater wrote:
> > > > This is a model of the PCIe host bridge found on Power8 chips,
> > > > including PowerBus logic interface, IOMMU support, PCIe root complex,
> > > > XICS MSI and LSI interrupt sources.
> > > > 
> > > > 4 PHBs are provisioned under the Power8 chip model to fit hardware but
> > > > only one is currently initialized.
> > > 
> > > What's the advantage in creating 4 PHBs instead of a single one,
> > 
> > The Power8 chip comes in different flavors: Venice, Murano, Naple, 
> > each having a different number of PHBs. We don't need to initialize 
> > them all to plug only a couple of devices (net, storage, usbs) 
> > 
> > When time comes, we might want to test some more complex configurations
> > or extend the modeling with CAPI support. That's why we have a :
> > 
> >     #define PNV_MAX_CHIP_PHB 4
> >         PnvPHB3      phbs[PNV_MAX_CHIP_PHB];
> > 
> > under the chip, and a 'num_phbs' attribute to increase the number
> > of controllers. It still needs to be tested but that's the goal.
[snip]
> > I didn't follow that discussion but this is "another" kind of PHB.
> > This one models the baremetal controller as found on OpenPOWER and
> > IBM Power machines. pSeries has a virtual PHB.
> 
> I understand that, and of course libvirt will need to learn about
> this new type of PHB and make sure both pSeries and PowerNV guests
> get the correct one assigned to them.

Hmm.. does it?  I would have thought pnv could act more like x86, in
that libvirt doesn't attempt to create PHBs at all and just use the
ones that are built in.

Though, come to that, I wouldn't think pnv support for libvirt would
be much of a priority anyway.  The machine type is still very much in
flux, and it's designed primarily for testing and development, not
"real world" usage.

> What I meant is that pSeries guests get a single PHB by default,
> with additional ones being instantiable through -device; this is
> also consistent with how PCI controllers are added to other guest
> types including pc, q35 and aarch64/virt, so it would be really
> nice if PowerNV behaved the same way.

Well.. sure.. but it doesn't.  pSeries is a virtual platform, so we
have a reasonable amount of flexibility to define it as we want.
PowerNV is an emulation of existing hardware which has a specific
behaviour which we need to match.

> > > As it is, this will confuse the heck out of libvirt's PCI address > 
> > > allocation algorithm :)
> > 
> > The pci bus name should be directly related to the PHB index. But
> > I agree we need to be careful. That's why you are in cc: :)
> 
> Thanks, I really appreciate you keeping me in the loop :)
> 

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

signature.asc
Description: PGP signature