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[Qemu-ppc] [PATCH v3 0/2] ppc/pnv: new Pnv8Chip and Pnv9Chip models
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH v3 0/2] ppc/pnv: new Pnv8Chip and Pnv9Chip models |
Date: |
Mon, 18 Jun 2018 19:05:38 +0200 |
Hello,
Here comes new chip models for the different processor the PowerNV
machine supports and some more cleanups around the device tree of the
ISA bus of the machine.
Thanks,
C.
Changes since v2:
- introduced a parent_realize
- removed the machines
Changes since v1:
- reworked the ISABus creation interface with the chip, the machine
is not aware anymore of the chip controllers.
- removed the bizarre controllers under the PnvChip base class.
- kept back some changes on the ISA device tree name. They will come
in time with the LPC controller for P9
Cédric Le Goater (2):
ppc/pnv: introduce Pnv8Chip and Pnv9Chip models
ppc/pnv: consolidate the creation of the ISA bus device tree
include/hw/ppc/pnv.h | 24 +++-
hw/ppc/pnv.c | 332 +++++++++++++++++++++++++++++++--------------------
2 files changed, 225 insertions(+), 131 deletions(-)
--
2.13.6
- [Qemu-ppc] [PATCH v3 0/2] ppc/pnv: new Pnv8Chip and Pnv9Chip models,
Cédric Le Goater <=