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Re: [Qemu-ppc] [PATCH 4/6] ppc/pnv: introduce a pnv_chip_core_realize()
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH 4/6] ppc/pnv: introduce a pnv_chip_core_realize() routine |
Date: |
Fri, 15 Jun 2018 12:52:57 +1000 |
User-agent: |
Mutt/1.10.0 (2018-05-17) |
On Thu, Jun 14, 2018 at 04:00:41PM +0200, Cédric Le Goater wrote:
> This extracts from the PvChip realize routine the part creating the
> cores. On Power9, we will need to create the cores after the Xive
> interrupt controller is created.
>
> Signed-off-by: Cédric Le Goater <address@hidden>
Applied to ppc-for-3.0, thanks.
> ---
> hw/ppc/pnv.c | 32 ++++++++++++++++++++++----------
> 1 file changed, 22 insertions(+), 10 deletions(-)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index 72cfe4c2627c..b3b0dd44582f 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -822,9 +822,8 @@ static void pnv_chip_icp_realize(PnvChip *chip, Error
> **errp)
> }
> }
>
> -static void pnv_chip_realize(DeviceState *dev, Error **errp)
> +static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
> {
> - PnvChip *chip = PNV_CHIP(dev);
> Error *error = NULL;
> PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> const char *typename = pnv_chip_core_typename(chip);
> @@ -836,14 +835,6 @@ static void pnv_chip_realize(DeviceState *dev, Error
> **errp)
> return;
> }
>
> - /* XSCOM bridge */
> - pnv_xscom_realize(chip, &error);
> - if (error) {
> - error_propagate(errp, error);
> - return;
> - }
> - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
> -
> /* Cores */
> pnv_chip_core_sanitize(chip, &error);
> if (error) {
> @@ -891,6 +882,27 @@ static void pnv_chip_realize(DeviceState *dev, Error
> **errp)
> &PNV_CORE(pnv_core)->xscom_regs);
> i++;
> }
> +}
> +
> +static void pnv_chip_realize(DeviceState *dev, Error **errp)
> +{
> + PnvChip *chip = PNV_CHIP(dev);
> + Error *error = NULL;
> +
> + /* XSCOM bridge */
> + pnv_xscom_realize(chip, &error);
> + if (error) {
> + error_propagate(errp, error);
> + return;
> + }
> + sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
> +
> + /* Cores */
> + pnv_chip_core_realize(chip, &error);
> + if (error) {
> + error_propagate(errp, error);
> + return;
> + }
>
> /* Create LPC controller */
> object_property_set_bool(OBJECT(&chip->lpc), true, "realized",
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- [Qemu-ppc] [PATCH 0/6] ppc/pnv: new Pnv8Chip and Pnv9Chip models, Cédric Le Goater, 2018/06/14
- [Qemu-ppc] [PATCH 1/6] ppc/pnv: introduce a 'primary' field under the LPC model, Cédric Le Goater, 2018/06/14
- [Qemu-ppc] [PATCH 2/6] ppc/pnv: move the details of the ISA bus creation under the LPC model, Cédric Le Goater, 2018/06/14
- [Qemu-ppc] [PATCH 3/6] ppc/pnv: introduce an 'isa_bus_name' field under the LPC model, Cédric Le Goater, 2018/06/14
- [Qemu-ppc] [PATCH 4/6] ppc/pnv: introduce a pnv_chip_core_realize() routine, Cédric Le Goater, 2018/06/14
- Re: [Qemu-ppc] [PATCH 4/6] ppc/pnv: introduce a pnv_chip_core_realize() routine,
David Gibson <=
- [Qemu-ppc] [PATCH 5/6] ppc/pnv: introduce a new intc_create() operation to the chip model, Cédric Le Goater, 2018/06/14
- [Qemu-ppc] [PATCH 6/6] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models, Cédric Le Goater, 2018/06/14