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Re: [Qemu-ppc] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on PPC440 |
Date: |
Thu, 14 Jun 2018 11:36:12 +1000 |
User-agent: |
Mutt/1.10.0 (2018-05-17) |
On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
> PPC440 has two opcodes for icbt, add the missing one.
A document reference to confim this would be nice.
> Signed-off-by: BALATON Zoltan <address@hidden>
> ---
> target/ppc/translate.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 5fe1ba6..3a215a1 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6707,6 +6707,8 @@ GEN_HANDLER_E(mbar, 0x1F, 0x16, 0x1a, 0x001FF801,
> GEN_HANDLER(msync_4xx, 0x1F, 0x16, 0x12, 0x03FFF801, PPC_BOOKE),
> GEN_HANDLER2_E(icbt_440, "icbt", 0x1F, 0x16, 0x00, 0x03E00001,
> PPC_BOOKE, PPC2_BOOKE206),
> +GEN_HANDLER2(icbt_440, "icbt", 0x1F, 0x06, 0x08, 0x03E00001,
> + PPC_440_SPEC),
> GEN_HANDLER(lvsl, 0x1f, 0x06, 0x00, 0x00000001, PPC_ALTIVEC),
> GEN_HANDLER(lvsr, 0x1f, 0x06, 0x01, 0x00000001, PPC_ALTIVEC),
> GEN_HANDLER(mfvscr, 0x04, 0x2, 0x18, 0x001ff800, PPC_ALTIVEC),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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[Qemu-ppc] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on PPC440, BALATON Zoltan, 2018/06/13
- Re: [Qemu-ppc] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on PPC440,
David Gibson <=
[Qemu-ppc] [PATCH v3 1/9] ppc4xx_i2c: Remove unimplemented sdata and intr registers, BALATON Zoltan, 2018/06/13
[Qemu-ppc] [PATCH v3 4/9] hw/timer: Add basic M41T80 emulation, BALATON Zoltan, 2018/06/13