Re: [Qemu-ppc] [PATCH v4 4/5] target/ppc: add hash MMU support for PowerNV POWER9 machines

[Cédric Le Goater]

On 05/03/2018 02:58 AM, David Gibson wrote:
> On Tue, Apr 24, 2018 at 02:41:47PM +0200, Cédric Le Goater wrote:
>> On 04/24/2018 02:03 PM, Cédric Le Goater wrote:
>>>> +hwaddr ppc_hash64_hpt_reg(PowerPCCPU *cpu)
>>>> +{
>>>> +    CPUPPCState *env = &cpu->env;
>>>> +
>>>> +    /* We should not reach this routine on sPAPR machines */
>>>> +    assert(!cpu->vhyp);
>>>> +
>>>> +    /* PowerNV machine */
>>>> +    if (msr_hv) {
>>>> +        if (env->mmu_model & POWERPC_MMU_3_00) {
>>>> +            return ppc64_v3_get_patbe0(cpu);
>>>> +        } else {
>>>> +            return cpu->env.spr[SPR_SDR1];
>>>> +        }
>>>> +    } else {
>>>> +        error_report("PowerNV guest support Unimplemented");
>>>> +        exit(1);
>>>
>>> I just noticed that this breaks 970 CPUs ...
>>
>> How about ?
> 
> Hmm.. I'm not actually seeing why it breaks 970.

it does not have MSR_SHV bit.

> I really want to ditch 970 support, but we have to go through the
> deprecation process first.

Is it causing a lot of maintenance issues ? 

>>
>>     if (env->mmu_model < POWERPC_MMU_2_07) {
>>         return cpu->env.spr[SPR_SDR1];
>>     }
>>
>>     /* P8/P9 PowerNV machine */
>>     if (msr_hv) {
>>         if (env->mmu_model == POWERPC_MMU_3_00) {
>>             return ppc64_v3_get_patbe0(cpu);
>>         } else {
>>             return cpu->env.spr[SPR_SDR1];
>>         }
>>     } else {
>>         error_report("PowerNV guest support Unimplemented");
>>         exit(1);
>>     }
>>
>> and I have to fix all the :
>>
>>      env->mmu_model & POWERPC_MMU_3_00
>>
>> by :
>>
>>      env->mmu_model == POWERPC_MMU_3_00
>>
>> I tripped over with the recent changes
> 
> Right.. eventually I actually want this to be something more like
>       if (cpu->radix64_opts)
> but I'm not sure on the details yet.

OK.

C.