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[Qemu-ppc] [PULL 01/49] uninorth: trivial style fixups
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 01/49] uninorth: trivial style fixups |
Date: |
Fri, 27 Apr 2018 19:20:38 +1000 |
From: Mark Cave-Ayland <address@hidden>
This makes sure we keep patchew/checkpatch happy during the remainder of this
patchset.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/pci-host/uninorth.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index 66991da975..710818e355 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -272,7 +272,6 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
UNINState *d;
/* Uninorth AGP bus */
-
dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
qdev_init_nofail(dev);
s = SYS_BUS_DEVICE(dev);
@@ -302,16 +301,23 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic,
static void unin_main_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- d->config[0x34] = 0x00; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer */
+ d->config[0x34] = 0x00;
}
static void unin_agp_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- // d->config[0x34] = 0x80; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer
+ d->config[0x34] = 0x80; */
+
/*
* Set kMacRISCPCIAddressSelect (0x48) register to indicate PCI
* memory space with base 0x80000000, size 0x10000000 for Apple's
@@ -333,9 +339,12 @@ static void u3_agp_pci_host_realize(PCIDevice *d, Error
**errp)
static void unin_internal_pci_host_realize(PCIDevice *d, Error **errp)
{
- d->config[0x0C] = 0x08; // cache_line_size
- d->config[0x0D] = 0x10; // latency_timer
- d->config[0x34] = 0x00; // capabilities_pointer
+ /* cache_line_size */
+ d->config[0x0C] = 0x08;
+ /* latency_timer */
+ d->config[0x0D] = 0x10;
+ /* capabilities_pointer */
+ d->config[0x34] = 0x00;
}
static void unin_main_pci_host_class_init(ObjectClass *klass, void *data)
--
2.14.3
- [Qemu-ppc] [PULL 00/49] ppc-for-2.13 queue 20180427, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 04/49] uninorth: remove stray PCIBus realize from mac_newworld.c, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 01/49] uninorth: trivial style fixups,
David Gibson <=
- [Qemu-ppc] [PULL 02/49] uninorth: remove second set of uninorth token registers, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 03/49] uninorth: QOMify PCI and AGP host bridges, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 09/49] grackle: remove deprecated pci_grackle_init() function, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 07/49] heathrow: remove obsolete heathow_init() function, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 08/49] grackle: general tidy-up and QOMify, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 11/49] mac_oldworld: remove pics IRQ array and wire up macio to heathrow directly, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 14/49] uninorth: introduce temporary pic_irqs device property, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 10/49] grackle: move PCI IO (ISA) memory region into the grackle device, David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 12/49] mac_oldworld: move wiring of macio IRQs to macio_oldworld_realize(), David Gibson, 2018/04/27
- [Qemu-ppc] [PULL 16/49] uninorth: fix PCI and AGP bus mixup, David Gibson, 2018/04/27