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Re: [Qemu-ppc] [PATCH for-2.13 09/10] target/ppc: Don't bother with MSR_
From: |
David Gibson |
Subject: |
Re: [Qemu-ppc] [PATCH for-2.13 09/10] target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr() |
Date: |
Fri, 20 Apr 2018 16:21:50 +1000 |
User-agent: |
Mutt/1.9.2 (2017-12-15) |
On Fri, Apr 20, 2018 at 08:08:59AM +0200, Thomas Huth wrote:
> On 17.04.2018 09:17, David Gibson wrote:
> > cpu_ppc_set_papr() removes the EP and HV bits from the MSR mask. While
> > removing the HV bit makes sense (a cpu in PAPR mode should never be
> > emulated in hypervisor mode), the EP bit is just bizarre. Although it's
> > true that a papr mode guest shouldn't be able to change the exception
> > prefix, the MSR[EP] bit doesn't even exist on the cpus supported for PAPR
> > mode, so it's pointless to do anything with it here.
> >
> > Signed-off-by: David Gibson <address@hidden>
> > ---
> > target/ppc/translate_init.c | 9 ++++-----
> > 1 file changed, 4 insertions(+), 5 deletions(-)
> >
> > diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c
> > index 5e89901149..bb5559d799 100644
> > --- a/target/ppc/translate_init.c
> > +++ b/target/ppc/translate_init.c
> > @@ -8870,12 +8870,11 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu,
> > PPCVirtualHypervisor *vhyp)
> >
> > cpu->vhyp = vhyp;
> >
> > - /* PAPR always has exception vectors in RAM not ROM. To ensure this,
> > - * MSR[IP] should never be set.
> > - *
> > - * We also disallow setting of MSR_HV
> > + /*
> > + * With a virtual hypervisor mode we never allow the CPU to go
> > + * hypervisor mode itself
> > */
> > - env->msr_mask &= ~((1ull << MSR_EP) | MSR_HVB);
> > + env->msr_mask &= ~MSR_HVB;
> >
> > /* Tell KVM that we're in PAPR mode */
> > if (kvm_enabled()) {
>
> Looks right.
>
> Reviewed-by: Thomas Huth <address@hidden>
Turns out this one is pretty much independent of the rest of the
series, so I've merged it to ppc-for-2.13 already.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-ppc] [PATCH for-2.13 03/10] target/ppc: Remove unnecessary initialization of LPCR_UPRT, (continued)
[Qemu-ppc] [PATCH for-2.13 07/10] spapr: Make a helper to set up cpu entry point state, David Gibson, 2018/04/17
[Qemu-ppc] [PATCH for-2.13 09/10] target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr(), David Gibson, 2018/04/17
[Qemu-ppc] [PATCH for-2.13 02/10] spapr: Remove support for PowerPC 970 with pseries machine type, David Gibson, 2018/04/17
Re: [Qemu-ppc] [PATCH for-2.13 02/10] spapr: Remove support for PowerPC 970 with pseries machine type, Greg Kurz, 2018/04/20
[Qemu-ppc] [PATCH for-2.13 05/10] spapr: Move PAPR mode register initialization to spapr code, David Gibson, 2018/04/17
[Qemu-ppc] [PATCH for-2.13 06/10] target/ppc: Add ppc_store_lpcr() helper, David Gibson, 2018/04/17