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[Qemu-ppc] [RFC for-2.13 3/7] target/ppc: Add ppc_hash64_filter_pagesize
From: |
David Gibson |
Subject: |
[Qemu-ppc] [RFC for-2.13 3/7] target/ppc: Add ppc_hash64_filter_pagesizes() |
Date: |
Thu, 19 Apr 2018 16:29:13 +1000 |
The paravirtualized PAPR platform sometimes needs to restrict the guest to
using only some of the page sizes actually supported by the host's MMU.
At the moment this is handled in KVM specific code, but for consistency we
want to apply the same limitations to all accelerators.
This makes a start on this by providing a helper function in the cpu code
to allow platform code to remove some of the cpu's page size definitions
via a caller supplied callback.
Signed-off-by: David Gibson <address@hidden>
---
target/ppc/mmu-hash64.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++
target/ppc/mmu-hash64.h | 3 +++
2 files changed, 62 insertions(+)
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index a1db20e3a8..b6e62864fd 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/ppc/mmu-hash64.c
@@ -1165,3 +1165,62 @@ const PPCHash64Options ppc_hash64_opts_POWER7 = {
},
}
};
+
+void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu,
+ bool (*cb)(void *, uint32_t, uint32_t),
+ void *opaque)
+{
+ PPCHash64Options *opts = cpu->hash64_opts;
+ int i;
+ int n = 0;
+ bool ci_largepage = false;
+
+ assert(opts);
+
+ n = 0;
+ for (i = 0; i < ARRAY_SIZE(opts->sps); i++) {
+ PPCHash64SegmentPageSizes *sps = &opts->sps[i];
+ int j;
+ int m = 0;
+
+ assert(n <= i);
+
+ if (!sps->page_shift) {
+ break;
+ }
+
+ for (j = 0; j < ARRAY_SIZE(sps->enc); j++) {
+ PPCHash64PageSize *ps = &sps->enc[j];
+
+ assert(m <= j);
+ if (!ps->page_shift) {
+ break;
+ }
+
+ if (cb(opaque, sps->page_shift, ps->page_shift)) {
+ if (ps->page_shift == 16) {
+ ci_largepage = true;
+ }
+ sps->enc[m++] = *ps;
+ }
+ }
+
+ /* Clear rest of the row */
+ for (j = m; j < ARRAY_SIZE(sps->enc); j++) {
+ memset(&sps->enc[j], 0, sizeof(sps->enc[j]));
+ }
+
+ if (m) {
+ n++;
+ }
+ }
+
+ /* Clear the rest of the table */
+ for (i = n; i < ARRAY_SIZE(opts->sps); i++) {
+ memset(&opts->sps[i], 0, sizeof(opts->sps[i]));
+ }
+
+ if (!ci_largepage) {
+ opts->flags &= ~PPC_HASH64_CI_LARGEPAGE;
+ }
+}
diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h
index f23b78d787..1aa2453497 100644
--- a/target/ppc/mmu-hash64.h
+++ b/target/ppc/mmu-hash64.h
@@ -20,6 +20,9 @@ unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu,
void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val);
void ppc_hash64_init(PowerPCCPU *cpu);
void ppc_hash64_finalize(PowerPCCPU *cpu);
+void ppc_hash64_filter_pagesizes(PowerPCCPU *cpu,
+ bool (*cb)(void *, uint32_t, uint32_t),
+ void *opaque);
#endif
/*
--
2.14.3
- [Qemu-ppc] [RFC for-2.13 0/7] spapr: Clean up pagesize handling, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 3/7] target/ppc: Add ppc_hash64_filter_pagesizes(),
David Gibson <=
- [Qemu-ppc] [RFC for-2.13 2/7] spapr: Use maximum page size capability to simplify memory backend checking, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 7/7] spapr_pci: Remove unhelpful pagesize warning, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 4/7] spapr: Add cpu_apply hook to capabilities, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 5/7] spapr: Limit available pagesizes to provide a consistent guest environment, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 6/7] spapr: Don't rewrite mmu capabilities in KVM mode, David Gibson, 2018/04/19
- [Qemu-ppc] [RFC for-2.13 1/7] spapr: Maximum (HPT) pagesize property, David Gibson, 2018/04/19
- Re: [Qemu-ppc] [RFC for-2.13 0/7] spapr: Clean up pagesize handling, Andrea Bolognani, 2018/04/19