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[Qemu-ppc] [PULL 18/22] ppc/pnv: introduce pnv*_is_power9() helpers
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 18/22] ppc/pnv: introduce pnv*_is_power9() helpers |
Date: |
Wed, 17 Jan 2018 13:25:21 +1100 |
From: Cédric Le Goater <address@hidden>
These are useful when instantiating device models which are shared
between the POWER8 and the POWER9 processor families.
Signed-off-by: Cédric Le Goater <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/pnv_xscom.c | 8 +++-----
include/hw/ppc/pnv.h | 10 ++++++++++
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index e51d634f40..99c40efecd 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -51,10 +51,9 @@ static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
{
- PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
-
addr &= (PNV_XSCOM_SIZE - 1);
- if (pcc->chip_type == PNV_CHIP_POWER9) {
+
+ if (pnv_chip_is_power9(chip)) {
return addr >> 3;
} else {
return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
@@ -231,7 +230,6 @@ int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
int xscom_offset;
ForeachPopulateArgs args;
char *name;
- PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
name = g_strdup_printf("address@hidden" PRIx64, be64_to_cpu(reg[0]));
xscom_offset = fdt_add_subnode(fdt, root_offset, name);
@@ -242,7 +240,7 @@ int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
_FDT((fdt_setprop_cell(fdt, xscom_offset, "#size-cells", 1)));
_FDT((fdt_setprop(fdt, xscom_offset, "reg", reg, sizeof(reg))));
- if (pcc->chip_type == PNV_CHIP_POWER9) {
+ if (pnv_chip_is_power9(chip)) {
_FDT((fdt_setprop(fdt, xscom_offset, "compatible", compat_p9,
sizeof(compat_p9))));
} else {
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 61896f9fd7..f023f1ec99 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -138,6 +138,16 @@ typedef struct PnvMachineState {
Notifier powerdown_notifier;
} PnvMachineState;
+static inline bool pnv_chip_is_power9(const PnvChip *chip)
+{
+ return PNV_CHIP_GET_CLASS(chip)->chip_type == PNV_CHIP_POWER9;
+}
+
+static inline bool pnv_is_power9(PnvMachineState *pnv)
+{
+ return pnv_chip_is_power9(pnv->chips[0]);
+}
+
#define PNV_FDT_ADDR 0x01000000
#define PNV_TIMEBASE_FREQ 512000000ULL
--
2.14.3
- [Qemu-ppc] [PULL 00/22] ppc-for-2.12 queue 20180117, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 04/22] spapr: Validate capabilities on migration, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 21/22] target/ppc: add support for POWER9 HILE, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 09/22] spapr: Remove unnecessary 'options' field from sPAPRCapabilityInfo, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 07/22] spapr: Handle Decimal Floating Point (DFP) as an optional capability, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 06/22] spapr: Handle VMX/VSX presence as an spapr capability flag, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 03/22] spapr: Treat Hardware Transactional Memory (HTM) as an optional capability, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 18/22] ppc/pnv: introduce pnv*_is_power9() helpers,
David Gibson <=
- [Qemu-ppc] [PULL 17/22] ppc/pnv: change core mask for POWER9, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 13/22] spapr: Adjust default VSMT value for better migration compatibility, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 12/22] spapr: Allow some cases where we can't set VSMT mode in the kernel, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 02/22] spapr: Capabilities infrastructure, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 22/22] target-ppc: Fix booke206 tlbwe TLB instruction, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 19/22] ppc/pnv: fix XSCOM core addressing on POWER9, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 01/22] target/ppc: Yet another fix for KVM-HV HPTE accessors, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 10/22] ppc: Change Power9 compat table to support at most 8 threads/core, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 05/22] target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM, David Gibson, 2018/01/16
- [Qemu-ppc] [PULL 11/22] target/ppc: Clarify compat mode max_threads value, David Gibson, 2018/01/16