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[Qemu-ppc] [PATCH 3/6] ppc/pnv: introduce pnv*_is_power9() helpers
From: |
Cédric Le Goater |
Subject: |
[Qemu-ppc] [PATCH 3/6] ppc/pnv: introduce pnv*_is_power9() helpers |
Date: |
Mon, 15 Jan 2018 19:04:03 +0100 |
These are useful when instantiating device models which are shared
between the POWER8 and the POWER9 processor families.
Signed-off-by: Cédric Le Goater <address@hidden>
---
hw/ppc/pnv_xscom.c | 8 +++-----
include/hw/ppc/pnv.h | 10 ++++++++++
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
index e51d634f4062..99c40efecdf9 100644
--- a/hw/ppc/pnv_xscom.c
+++ b/hw/ppc/pnv_xscom.c
@@ -51,10 +51,9 @@ static void xscom_complete(CPUState *cs, uint64_t hmer_bits)
static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr)
{
- PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
-
addr &= (PNV_XSCOM_SIZE - 1);
- if (pcc->chip_type == PNV_CHIP_POWER9) {
+
+ if (pnv_chip_is_power9(chip)) {
return addr >> 3;
} else {
return ((addr >> 4) & ~0xfull) | ((addr >> 3) & 0xf);
@@ -231,7 +230,6 @@ int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
int xscom_offset;
ForeachPopulateArgs args;
char *name;
- PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
name = g_strdup_printf("address@hidden" PRIx64, be64_to_cpu(reg[0]));
xscom_offset = fdt_add_subnode(fdt, root_offset, name);
@@ -242,7 +240,7 @@ int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset)
_FDT((fdt_setprop_cell(fdt, xscom_offset, "#size-cells", 1)));
_FDT((fdt_setprop(fdt, xscom_offset, "reg", reg, sizeof(reg))));
- if (pcc->chip_type == PNV_CHIP_POWER9) {
+ if (pnv_chip_is_power9(chip)) {
_FDT((fdt_setprop(fdt, xscom_offset, "compatible", compat_p9,
sizeof(compat_p9))));
} else {
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 61896f9fd767..f023f1ec99c0 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -138,6 +138,16 @@ typedef struct PnvMachineState {
Notifier powerdown_notifier;
} PnvMachineState;
+static inline bool pnv_chip_is_power9(const PnvChip *chip)
+{
+ return PNV_CHIP_GET_CLASS(chip)->chip_type == PNV_CHIP_POWER9;
+}
+
+static inline bool pnv_is_power9(PnvMachineState *pnv)
+{
+ return pnv_chip_is_power9(pnv->chips[0]);
+}
+
#define PNV_FDT_ADDR 0x01000000
#define PNV_TIMEBASE_FREQ 512000000ULL
--
2.13.6
- [Qemu-ppc] [PATCH 0/6] ppc/pnv: misc fixes and cleanups for POWER9, Cédric Le Goater, 2018/01/15
- [Qemu-ppc] [PATCH 1/6] ppc/pnv: use POWER9 DD2 processor, Cédric Le Goater, 2018/01/15
- [Qemu-ppc] [PATCH 2/6] ppc/pnv: change core mask for POWER9, Cédric Le Goater, 2018/01/15
- [Qemu-ppc] [PATCH 3/6] ppc/pnv: introduce pnv*_is_power9() helpers,
Cédric Le Goater <=
- [Qemu-ppc] [PATCH 4/6] ppc/pnv: fix XSCOM core addressing on POWER9, Cédric Le Goater, 2018/01/15
- [Qemu-ppc] [PATCH 5/6] ppc/pnv: change initrd address, Cédric Le Goater, 2018/01/15
- [Qemu-ppc] [PATCH 6/6] target/ppc: add support for POWER9 HILE, Cédric Le Goater, 2018/01/15
- Re: [Qemu-ppc] [PATCH 0/6] ppc/pnv: misc fixes and cleanups for POWER9, David Gibson, 2018/01/16