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[Qemu-ppc] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions
From: |
Aaron Larson |
Subject: |
[Qemu-ppc] [PATCH] target-ppc: SPR_BOOKE_ESR not set on FP exceptions |
Date: |
Wed, 21 Jun 2017 17:03:08 -0700 |
Properly set the book E exception syndrome register when a floating
point exception occurs.
Currently on a book E processor, the POWERPC_EXCP_FP exception handler
fails to set "env->spr[SPR_BOOKE_ESR] = ESR_FP;" as required by the
book E specification.
Signed-off-by: Aaron Larson <address@hidden>
---
target/ppc/excp_helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 9cb2123..7a82bdd 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -282,6 +282,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int
excp_model, int excp)
* precise in the MSR.
*/
msr |= 0x00100000;
+ env->spr[SPR_BOOKE_ESR] = ESR_FP;
break;
case POWERPC_EXCP_INVAL:
LOG_EXCP("Invalid instruction at " TARGET_FMT_lx "\n", env->nip);
--
2.7.4
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