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[Qemu-ppc] [PATCH v4 2/6] xics: pass appropriate types to realize() hand
From: |
Greg Kurz |
Subject: |
[Qemu-ppc] [PATCH v4 2/6] xics: pass appropriate types to realize() handlers. |
Date: |
Thu, 08 Jun 2017 15:42:50 +0200 |
User-agent: |
StGit/0.17.1-20-gc0b1b-dirty |
It makes more sense to pass an IPCState * to handlers of ICPStateClass
instead of a DeviceState *, if only to benefit from compile time type
checking. The same goes with ICSStateClass.
While here, we also change the declaration of ICPStateClass in xics.h
for consistency.
Signed-off-by: Greg Kurz <address@hidden>
---
hw/intc/xics.c | 10 ++++------
hw/intc/xics_kvm.c | 6 ++----
hw/intc/xics_pnv.c | 6 +++---
include/hw/ppc/xics.h | 8 ++++----
4 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index aa2c4e744f65..f74a96e932d7 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -356,7 +356,7 @@ static void icp_realize(DeviceState *dev, Error **errp)
icp->xics = XICS_FABRIC(obj);
if (icpc->realize) {
- icpc->realize(dev, errp);
+ icpc->realize(icp, errp);
}
qemu_register_reset(icp_reset, dev);
@@ -606,10 +606,8 @@ static void ics_simple_initfn(Object *obj)
ics->offset = XICS_IRQ_BASE;
}
-static void ics_simple_realize(DeviceState *dev, Error **errp)
+static void ics_simple_realize(ICSState *ics, Error **errp)
{
- ICSState *ics = ICS_SIMPLE(dev);
-
if (!ics->nr_irqs) {
error_setg(errp, "Number of interrupts needs to be greater 0");
return;
@@ -617,7 +615,7 @@ static void ics_simple_realize(DeviceState *dev, Error
**errp)
ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
- qemu_register_reset(ics_simple_reset, dev);
+ qemu_register_reset(ics_simple_reset, ics);
}
static Property ics_simple_properties[] = {
@@ -664,7 +662,7 @@ static void ics_base_realize(DeviceState *dev, Error **errp)
if (icsc->realize) {
- icsc->realize(dev, errp);
+ icsc->realize(ics, errp);
}
}
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
index 45bf110b51e6..41c5b9439562 100644
--- a/hw/intc/xics_kvm.c
+++ b/hw/intc/xics_kvm.c
@@ -328,10 +328,8 @@ static void ics_kvm_reset(void *dev)
ics_set_kvm_state(ics, 1);
}
-static void ics_kvm_realize(DeviceState *dev, Error **errp)
+static void ics_kvm_realize(ICSState *ics, Error **errp)
{
- ICSState *ics = ICS_SIMPLE(dev);
-
if (!ics->nr_irqs) {
error_setg(errp, "Number of interrupts needs to be greater 0");
return;
@@ -339,7 +337,7 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp)
ics->irqs = g_malloc0(ics->nr_irqs * sizeof(ICSIRQState));
ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
- qemu_register_reset(ics_kvm_reset, dev);
+ qemu_register_reset(ics_kvm_reset, ics);
}
static void ics_kvm_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/xics_pnv.c b/hw/intc/xics_pnv.c
index 12ae605f10e8..2a955a894678 100644
--- a/hw/intc/xics_pnv.c
+++ b/hw/intc/xics_pnv.c
@@ -159,11 +159,11 @@ static const MemoryRegionOps pnv_icp_ops = {
},
};
-static void pnv_icp_realize(DeviceState *dev, Error **errp)
+static void pnv_icp_realize(ICPState *icp, Error **errp)
{
- PnvICPState *icp = PNV_ICP(dev);
+ PnvICPState *pnv_icp = PNV_ICP(icp);
- memory_region_init_io(&icp->mmio, OBJECT(dev), &pnv_icp_ops,
+ memory_region_init_io(&pnv_icp->mmio, OBJECT(icp), &pnv_icp_ops,
icp, "icp-thread", 0x1000);
}
diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
index 31145326ebf9..797df82fefc0 100644
--- a/include/hw/ppc/xics.h
+++ b/include/hw/ppc/xics.h
@@ -65,9 +65,9 @@ typedef struct XICSFabric XICSFabric;
struct ICPStateClass {
DeviceClass parent_class;
- void (*realize)(DeviceState *dev, Error **errp);
- void (*pre_save)(ICPState *s);
- int (*post_load)(ICPState *s, int version_id);
+ void (*realize)(ICPState *icp, Error **errp);
+ void (*pre_save)(ICPState *icp);
+ int (*post_load)(ICPState *icp, int version_id);
void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu);
void (*reset)(ICPState *icp);
};
@@ -113,7 +113,7 @@ struct PnvICPState {
struct ICSStateClass {
DeviceClass parent_class;
- void (*realize)(DeviceState *dev, Error **errp);
+ void (*realize)(ICSState *s, Error **errp);
void (*pre_save)(ICSState *s);
int (*post_load)(ICSState *s, int version_id);
void (*reject)(ICSState *s, uint32_t irq);
- [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, (continued)
- [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Greg Kurz, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Cédric Le Goater, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Greg Kurz, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Cédric Le Goater, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Greg Kurz, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Cédric Le Goater, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Greg Kurz, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Cédric Le Goater, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, David Gibson, 2017/06/08
- Re: [Qemu-ppc] [PATCH v4 1/6] xics: introduce macros for ICP/ICS link properties, Cédric Le Goater, 2017/06/09
[Qemu-ppc] [PATCH v4 2/6] xics: pass appropriate types to realize() handlers.,
Greg Kurz <=
[Qemu-ppc] [PATCH v4 3/6] xics: setup cpu at realize time, Greg Kurz, 2017/06/08
[Qemu-ppc] [PATCH v4 4/6] xics: drop ICPStateClass::cpu_setup() handler, Greg Kurz, 2017/06/08
[Qemu-ppc] [PATCH v4 5/6] xics: directly register ICPState objects to vmstate, Greg Kurz, 2017/06/08
[Qemu-ppc] [PATCH v4 6/6] spapr: fix migration of ICPState objects from/to older QEMU, Greg Kurz, 2017/06/08