Re: [Qemu-ppc] [PATCH v2] target/ppc: rewrite f[n]m[add, sub] using float64_muladd

[Nikunj A Dadhania]

David Gibson <address@hidden> writes:

> [ Unknown signature status ]
> On Fri, Mar 03, 2017 at 02:31:38PM +1100, Richard Henderson wrote:
>> On 03/03/2017 01:10 AM, Nikunj A Dadhania wrote:
>> > +static void float64_maddsub_update_excp(CPUPPCState *env, float64 arg1,
>> > +                                        float64 arg2, float64 arg3,
>> > +                                        unsigned int madd_flags)
>> >  {
>> > +    if (unlikely((float64_is_infinity(arg1) && float64_is_zero(arg2)) ||
>> > +                 (float64_is_zero(arg1) && float64_is_infinity(arg2)))) {
>> >          /* Multiplication of zero by infinity */
>> > +        arg1 = float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);
>> > +    } else if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) ||
>> > +                        float64_is_signaling_nan(arg2, &env->fp_status) ||
>> > +                        float64_is_signaling_nan(arg3, &env->fp_status))) 
>> > {
>> > +        /* sNaN operation */
>> > +        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
>> 
>> Are you sure you shouldn't be testing for NaN first?
>> Do you really get VXIMZ if arg3 (the addend) is (S)NaN?
>> 
>> You should probably eliminate QNaN as well, before the other checks.
>
> Oh.. I've already merged and pull requested this.

The behaviour has not changed as compared to previous version.

> I'm afraid any further corrections will have to be done as followup
> patches.

I will send a follow-up with fixing other multiply-add versions as well.

Regards
Nikunj